NurseBob 111 Posted July 5, 2016 Share Posted July 5, 2016 To simplify debugging, I'm contemplating connecting two serial devices (gps - MT3339 and sat-comm - Iridium 9602 ) to the same RX/TX pins on the msp430f5529lp (port pins P3.3 and P3.4). They are never powered at the same time. This uses Serail1 for GPS fixes and Sat-Comm messages, and leaves Serial free for debug. Are there problems with doing this? Quote Link to post Share on other sites
yyrkoon 250 Posted July 6, 2016 Share Posted July 6, 2016 I'm no expert. I have however been told to *never* apply voltages to pins on a device that is powered down( without a buffer ). I'm not really sure if this applies in this situation, but you could check the datasheets for the uart devices in question and see what concerns there might be for situations such as this. EDIT: By the way. Hi "homey". Born and raised N bay area CA myself. BOrn in fairfield, grew up mostly in Napa / Sonoma. Quote Link to post Share on other sites
NurseBob 111 Posted July 6, 2016 Author Share Posted July 6, 2016 I'm no expert. I have however been told to *never* apply voltages to pins on a device that is powered down( without a buffer ). I'm not really sure if this applies in this situation, but you could check the datasheets for the uart devices in question and see what concerns there might be for situations such as this. EDIT: By the way. Hi "homey". Born and raised N bay area CA myself. BOrn in fairfield, grew up mostly in Napa / Sonoma. Thanks for the advice. I'll take a look. As to "home," I've never gotten far from the Bay Area. Born in Richmond, lived in Berkeley, Orinda, Cotati, Davis, Concord, Walnut Creek, Napa, and now St. Helena. Though we are looking at Santa Fe, NM in a couple of years... Take care. Quote Link to post Share on other sites
spirilis 1,265 Posted July 6, 2016 Share Posted July 6, 2016 Yes the main problem is the I/O pins on most digital devices have ESD protection (electrostatic discharge) which is intended to "drain off" excess voltage above Vcc or below GND into the Vcc or GND planes where it can hopefully get absorbed by capacitors or shunted through the GND plane or whatever.... but those basically involve a pair of diodes reverse-biased. (wish I had a pic handy, too lazy to find one) edit: The problem happens when you apply a legitimate (3.3V we'll say) signal to the I/O pin of a device whose Vcc is at GND potential (i.e. it's powered down). The protection diodes faithfully do their job, shunting that "excess voltage" to the Vcc rail, which then powers the chip. Oops! The answer is to use some sort of bus transceiver or Level Shifter to truly "disconnect" the powered-down device. I have done this (using a TI TXB series level shifter) for SPI bus pins with great success. Fmilburn and NurseBob 2 Quote Link to post Share on other sites
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