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Lgbeno

New MSP430 Wireless Sensor Node

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The other thing is Energia does not support SPI on USCI_A at all.  No hooks or methods let you reconfigure it to use USCI_A.  That's not a problem for CCS users not using the Energia framework (who may be using my msprf24 lib), but for Energia it's a no-go.

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you mean uscia? (uart is on uscia)

Yeah I'm mistaken on the name. Didn't bother to look it up. I usually simplify it in my mind that there is the port with the UART and then "the other port."

 

 

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That said, I don't see any problem in exposing USCI_B to the pins even with it being used by the HopeRF.  The RF75 does use an SPI chip select line right?  For one thing, it'd make it easy to debug your RF75 code with a logic analyzer :D

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Sorry for my ignorance, I want to write 32 bytes out of the SPI port can I load up a fifo and tell the peripheral go or do I need to load each byte into the register to shift out.

 

If the latter, I don't see as much advantage over bit banging.

 

 

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Sorry for my ignorance, I want to write 32 bytes out of the SPI port can I load up a fifo and tell the peripheral go or do I need to load each byte into the register to shift out.

 

If the latter, I don't see as much advantage over bit banging.

 

 

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It's the latter.  The SPI peripheral can still pump out the bits faster than bit-banging IIRC.

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It's the latter. The SPI peripheral can still pump out the bits faster than bit-banging IIRC.

I would have to think about that, the Transceiver can work up to 8MHz and the CPU is running at 16MHz. My instinct tells me that I can get close if not interrupted. I'll need to test it out I guess.

 

 

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My initial reaction is that it will come at a cost of energy usage as you're using CPU cycles instead of a peripheral - plus I don't believe the NRF library I use supports bit-bang.  Unfortunately I don't know enough to answer how big of an impact it might have to battery life, if in fact that's valid.

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My initial reaction is that it will come at a cost of energy usage as you're using CPU cycles instead of a peripheral - plus I don't believe the NRF library I use supports bit-bang. Unfortunately I don't know enough to answer how big of an impact it might have to battery life, if in fact that's valid.

I'll run some tests but I'm thinking that the impact won't be that much different because the CPU must stay active to feed bytes inti the peripheral anyway. The biggest tradeoff would be the performance hit that you are spending cycles shifting out bits instead of doing other computation.

 

 

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I'll run some tests but I'm thinking that the impact won't be that much different because the CPU must stay active to feed bytes inti the peripheral anyway. The biggest tradeoff would be the performance hit that you are spending cycles shifting out bits instead of doing other computation.

 

 

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Right - that's what I would expect to make an impact.  I typically drop into LPM (2 I think?) while the peripheral is shifting bits.  

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So, this is the tssop package right ? Doesn't the tssop package have more pin outs than the dip package ? And another timer, or something ? Been too long . . .

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Im using the 32 QFN which I'm not sure if it has any more pins than the 28tssop. But yes the addition is io's that are connected to the timers

 

 

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