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Seriously though, 337NFBGA.  What kind of PCBs constraints support those kinds of chips?  10 layer, super tight tolerances, blind vias, etc?

At some point I'm not even sure what all those pins CAN be used for.... seems like you just can't fit enough crap in a small enough space to make the hundreds of GPIOs useful for anything practical unless the switching is happening at quite a slow rate.  Unless 2/3rds of them are bus interface pins or LCD drive pins (think FR2xxx/4xxx for another good example of excessive pin count relative to core capability).

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There's already a post about the rumor and I'm just here to tease a bit A new ARM toy is coming June 10th.  Not only a new board but a new part. Be on the lookout!

So.. if it links in to this post then that would imply a TMS570LC4357-based LaunchPad. http://forum.43oh.com/topic/8412-new-hercules-lps-in-bound/   LaunchPads sometimes seem to follow along from t

That is funny... sort of.   I didn't make that error but now it's fixed.

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@@spirilis - If it is an LC4357, a few pins will likely be dedicated to EMAC, a la TM4C1294 Connected LP. The chip also supports 16 bit EMIF, so maybe there will be a FRAM chip using those? The previous LP brought out two 40 pin BP zones, and then duplicated those and added more with 50 pins on each side of the board. Many of the pads are VCC, VCCIO and GND so many will be wasted there, but that still leaves a lot of IO to accommodate... and that might explain the delay in release from "end of May" to June 10.

 

Otherwise, considering the MSP432 LP sort of broke the Booster Pack standard by having pins at the bottom edge of the board, who knows?

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@@spirilis - If it is an LC4357, a few pins will likely be dedicated to EMAC, a la TM4C1294 Connected LP. The chip also supports 16 bit EMIF, so maybe there will be a FRAM chip using those? The previous LP brought out two 40 pin BP zones, and then duplicated those and added more with 50 pins on each side of the board. Many of the pads are VCC, VCCIO and GND so many will be wasted there, but that still leaves a lot of IO to accommodate... and that might explain the delay in release from "end of May" to June 10.

 

Otherwise, considering the MSP432 LP sort of broke the Booster Pack standard by having pins at the bottom edge of the board, who knows?

Well, possibly unrelated to this I would say the MSP432 LP didn't "break" the BP standard, it just showed that the BP standard only goes so far ... since the BP headers of the MSP432 LP continue to abide by the pin function roles that the BP standard dictates (in http://processors.wiki.ti.com/index.php/BYOB )

 

Either way, I am curious to see what's coming out!  I am not personally a fan of the whole HALCoGen+CCS development chain but I acknowledge its usefulness in Hercules' intended use-cases.

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Yeah, maybe saying MSP432 broke the standard is a bit harsh, but the standard does mention that nothing should obstruct the buttons at the bottom of the LP. Would placing the LP on "top" of some expansion BP be okay? Probably.

 

Re- Hercules: apparently, the dual/lockstep core thing requires very specific code to get things booted up and working without throwing errors from the memory controller and such, so HalCoGen is an easy way do facilitate this and configure the peripherals. Does that mean that the cores can be 'decoupled' and run independently given proper code, I don't know.

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The thing about unlocking the cores, even if possible now, would just allow to use 1. You would need double cache for example for that to work.

I'm not a fan of code generation tools though I see their point. It's just I see lots of people that seem to know "nothing" because of them. But I guess they are using them wrong :P

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http://www.ti.com/lit/er/spnz180b/spnz180b.pdf- TMS570LC4357 device errata, issue CORTEX-R5#5 lists an issue regarding AXI slave interfaces and clocking. The workarounds are prefaced with "... This erratum can be avoided by making sure that one CPU does not access the cache of the other CPU while that CPU is in standby...."

 

Now, how could one core of two running in lockstep, and therefore running the same code, be in standby without the other being in the same state?

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No ARM-M7 unfortunately

 Hi Luis, today too many issue are on M4 chip and retirement of M3 caused too many issue to existing customer me too.

 A new M7 when still actual M4 has too many problem to solve is not a good move. Actually Axx series are more stable and mature product, what was worst in the past of TI is showing again, we need a long term policy than a game for TI short term profit.

 Cortex M7 is a good platform but before this why not cure trouble of M4, why not produce an M3 or better M4 to be useful not trash out old customer board and marketing?

 This way I never adopt a new TI product and after bla bla bla Blake treatment on e2e i interpreted as it was using best of us to get free support to a worst market.

 I love MSP430, good processor, industrial standard for over 20 year, it is time for series 5 and 6 to generate a new series 7 8 for example with simple same cpu and instruction extended to 32bit, X is a transition intermixed 16 20 bit, better is to translate full MSP430 to 32 bit. This IMHO can overkill a lot ARM.

After this burning I think after test on actual board I stop TIVA usage and I don't consider new MSP432 for new product. If MSP430 disappear in short range can be moved to a competitor M0+.

TI never learned from worst error of the past, customer stop trust on a company act as for stellaris and previous many year ago!!!

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That is funny... sort of.

 

I didn't make that error but now it's fixed. :)

 Good have one less error, some year ago TI site was one of best sites, simple good look & simple to use, today is full of broken link and errors, less intuitive difficult to understand what to do in front of less described multiple choices.

 This board require a multilayer fine pitch with few um lines, this product cost much more than a simple LP, this is a security cortex R step locked, has sense offer in the low cost market?

 Again there where two BP socket not fully wired and two socket, one 100 pin similar to EK-TM4c1294 and some fine pitch requiring again a board to connect emif and other peripheral... Has this a sense? Automotive and reliability devices has no limited budget as hobby and casual user.

 Boosterpack is a quite good prototype form, I fully hate Arduino layout due it is not usable on a proto board, Beaglebone has another good .1" standard connector, I loved see new MAX10 board using capemodel:

http://www.arrow.com/campaigns-na/altera/deca/

 

 On high speed design .1" standard is not usable so special high speed connector are required, daughter board design is sometimes more difficult to design than full board from scratch.

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@@RROMANO001 - I can't speak with regards to TI's sites' quality. I did alter the wiki page you pointed at and added the LAUNCHXL2 boards. Maybe if more people participated, there would be less error? TI, if I remember correctly, has been going through major website changes trying to bring all the products they supply together in to a common presentation, so I will give some sympathy to them.

 

 

Also, I think discussion about Hercules and if it is appropriate for hobby / casual users should be a different topic. Maybe start something in the "General" section in this area of http://43oh.com?

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New LP next to previous LP:

attachicon.gifIMG_20150531_102949122.jpg

 good Layout, two point I seen from, button are too close to Ethernet connector and maybe can harm finger during press, why not exchange LED and button position and give more clearance to reset too? Board border can be more usable for all 4 button too.

 

 On middle left I see an XTAL, the four fine pitch connector are dedicated to two board or just one daughter? If one again this component is on the daughter area.

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