MSPLife 2 Posted March 26, 2015 Share Posted March 26, 2015 Hi everyone, I want to set a high logic on PF0 pin, my code is below: SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY; HWREG(GPIO_PORTF_BASE + GPIO_O_CR) |= 0x01; HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = 0; GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_0);//RBG GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_0,GPIO_PIN_0); But I can not get 3.3V in output mode. Plz explain and help for my case. Thanks in advanced! Quote Link to post Share on other sites
bluehash 1,580 Posted March 26, 2015 Share Posted March 26, 2015 Which board or chip is this? Hi everyone, I want to set a high logic on PF0 pin, my code is below: SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY; HWREG(GPIO_PORTF_BASE + GPIO_O_CR) |= 0x01; HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = 0; GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_0);//RBG GPIOPinWrite(GPIO_PORTF_BASE,GPIO_PIN_0,GPIO_PIN_0); But I can not get 3.3V in output mode. Plz explain and help for my case. Thanks in advanced! Quote Link to post Share on other sites
icserny 9 Posted March 26, 2015 Share Posted March 26, 2015 I want to set a high logic on PF0 pin The PF0 pin shoud be unlocked before setting its mode The code fragment is from an example program from the J. Valvano's EDX course "Embedded Systems - Shape The World" See lines at step 2). SYSCTL_RCGC2_R |= 0x00000020; // 1) activate clock for Port F delay = SYSCTL_RCGC2_R; // allow time for clock to start GPIO_PORTF_LOCK_R = 0x4C4F434B; // 2) unlock GPIO Port F GPIO_PORTF_CR_R = 0x1F; // allow changes to PF4-0 // only PF0 needs to be unlocked, other bits can't be locked GPIO_PORTF_AMSEL_R = 0x00; // 3) disable analog on PF GPIO_PORTF_PCTL_R = 0x00000000; // 4) PCTL GPIO on PF4-0 GPIO_PORTF_DIR_R = 0x0E; // 5) PF4,PF0 in, PF3-1 out GPIO_PORTF_AFSEL_R = 0x00; // 6) disable alt funct on PF7-0 GPIO_PORTF_PUR_R = 0x11; // enable pull-up on PF0 and PF4 GPIO_PORTF_DEN_R = 0x1F; // 7) enable digital I/O on PF4-0 bluehash 1 Quote Link to post Share on other sites
L.R.A 78 Posted April 3, 2015 Share Posted April 3, 2015 Don't use HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = 0; "A write of the value 0x4C4F.434B unlocks the GPIO Commit (GPIOCR) register for write access.A write of any other value or a write to the GPIOCR register reapplies the lock, preventing any register updates." 0x4C4F.434B is the GPIO_LOCK_KEY Quote Link to post Share on other sites
MSPLife 2 Posted April 3, 2015 Author Share Posted April 3, 2015 Thanks all! Quote Link to post Share on other sites
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