Jump to content
nickn

Configuring the f5529lp to run at 25 MHz

Recommended Posts

Glad to see that the forums are back up :)

 

I've been trying to figure out how to configure the DCO to get an MCLK frequency of 25 MHz.  I've read some guides about DCO configuration but haven't found  much of anything (apart from the datasheet) that explains configuring the FLL to get accurate frequencies.  I've been pointed to using UCS_LFXT1Start(), UCS_clockSignalInit(), and UCS_initFLLSettle() but have never used those functions before.

 

Of course, it couldn't have been as easy as the G2553 and just use the calibrated clock configuration setting.

Share this post


Link to post
Share on other sites

@@nickn

 

You just need to set PMM registers and change the core voltage step by step. The code which given below sets the core voltage to correct value and also generates 25 MHz from LFXT1(32.768kHz). It is referenced from TI code examples.(MSP430F55xx_UCS_10.c) Only difference is ACLK = LFXT1, not REFO.

void set25mhz(void)
{
  P5SEL |= BIT4 + BIT5;                       // Select XT1
  
  // Increase Vcore setting to level3 to support fsystem=25MHz
  // NOTE: Change core voltage one level at a time..
  SetVcoreUp (0x01);
  SetVcoreUp (0x02);  
  SetVcoreUp (0x03);  
 
  UCSCTL6 &= ~(XT1OFF);                     // XT1 On
  UCSCTL4 |= SELA_0;                        // ACLK = LFTX1 (by default)  
  UCSCTL6 |= XCAP_3;                        // Internal load cap

  __bis_SR_register(SCG0);                  // Disable the FLL control loop
  UCSCTL0 = 0x0000;                         // Set lowest possible DCOx, MODx
  UCSCTL1 = DCORSEL_7;                      // Select DCO range 50MHz operation
  UCSCTL2 = FLLD_0 | 762;                   // Set DCO Multiplier for 25MHz
                                            // (N + 1) * FLLRef = Fdco
                                            // (762 + 1) * 32768 = 25MHz
                                            // Set FLL Div = fDCOCLK/2
  __bic_SR_register(SCG0);                  // Enable the FLL control loop

  // Worst-case settling time for the DCO when the DCO range bits have been
  // changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx
  // UG for optimization.
  // 32 x 32 x 25 MHz / 32,768 Hz ~ 780k MCLK cycles for DCO to settle
  __delay_cycles(782000);

  // Loop until XT1,XT2 & DCO stabilizes - In this case only DCO has to stabilize
  do
  {
    UCSCTL7 &= ~(XT2OFFG | XT1LFOFFG | DCOFFG);
                                            // Clear XT2,XT1,DCO fault flags
    SFRIFG1 &= ~OFIFG;                      // Clear fault flags
  }while (SFRIFG1&OFIFG);                   // Test oscillator fault flag 

  UCSCTL6 &= ~(XT1DRIVE_3);                 // Xtal is now stable, reduce drive strength  
}

void SetVcoreUp (unsigned int level)
{
  // Open PMM registers for write
  PMMCTL0_H = PMMPW_H;              
  // Set SVS/SVM high side new level
  SVSMHCTL = SVSHE | SVSHRVL0 * level | SVMHE | SVSMHRRL0 * level;
  // Set SVM low side to new level
  SVSMLCTL = SVSLE | SVMLE | SVSMLRRL0 * level;
  // Wait till SVM is settled
  while ((PMMIFG & SVSMLDLYIFG) == 0);
  // Clear already set flags
  PMMIFG &= ~(SVMLVLRIFG | SVMLIFG);
  // Set VCore to new level
  PMMCTL0_L = PMMCOREV0 * level;
  // Wait till new level reached
  if ((PMMIFG & SVMLIFG))
    while ((PMMIFG & SVMLVLRIFG) == 0);
  // Set SVS/SVM low side to new level
  SVSMLCTL = SVSLE | SVSLRVL0 * level | SVMLE | SVSMLRRL0 * level;
  // Lock PMM registers for write access
  PMMCTL0_H = 0x00;
}

Share this post


Link to post
Share on other sites

Hi @@nickn,

 

Looks like you are using driverlib function calls - great! It is recommended to use the PMM_setVCore() function call from driverlib for setting the Vcore level before you change the clock - this has the most recent implementation of what @@fatihinanc showed you in their code. This will do all the single stepping of the core and required checks for you.

 

For using the UCS functions you mentioned - are you using CCS? If you have CCSv6 with MSP430ware, go to View > Resource Explorer and you can see in MSP430ware under Libraries there is Driver Library, and there should be examples here for all the different driver library functions. I remember there is even one specifically for setting the DCO to a desired frequency on F5xx: in Resource Explorer, MSP430ware > Libraries > Driver Library > MSP430F5xx_6xx > Example Projects > UCS > ucs_ex1_DCO12MHz.

 

If you have questions about how a particular driverlib function call works, you can find documentation built into Resource Explorer under MSP430ware > Libraries > Driver Library > MSP430F5xx_6xx > API Programmer's Guide. This is html-based documentation - you can click Modules to get a list of all the modules in the device family, click on one of them (like ucs) and it will give you a list of all the function calls for that module. Click on a function call, like UCS_initFLLSettle, and it has a full description and a list of all the parameters that you pass to it.

 

MSP430ware also has some blank driverlib projects that you can use as a starting place. Let me know if you have any more driverlib questions! I like to help people out with these libraries.

 

Regards,

Katie

Share this post


Link to post
Share on other sites

Join the conversation

You can post now and register later. If you have an account, sign in now to post with your account.

Guest
Reply to this topic...

×   Pasted as rich text.   Paste as plain text instead

  Only 75 emoji are allowed.

×   Your link has been automatically embedded.   Display as a link instead

×   Your previous content has been restored.   Clear editor

×   You cannot paste images directly. Upload or insert images from URL.


×
×
  • Create New...