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BeagleLogic Kernel - Sample at 100 kHz to 100 MHz Using PRUs

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Kumar Abhishek is involved in getting this project done under Beagleboard.org's Google Summer of Code 2014.

 

The core of the logic analyzer is a kernel driver that interfaces to the PRU Firmware via the remoteproc interface and performs memory management wherein the PRU directly writes logic samples to the DDR RAM.

The kernel driver forms the base of sigrok bindings for BeagleLogic, the implementation of which is in progress at the time of writing. sigrok bindings for BeagleLogic will enable it as a powerful debugging and learning tool.

 

The HTML5 front end is still yet to be done, but it seems like the BBB is turning into a nice debugging utility. Looking forward to the frontend UI.

 

Git rep: https://github.com/abhishek-kakkar/BeagleLogic/wiki

 

This Hackaday post has some good info in the comments by the creator.

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I followed the project awhile back when it was originally done; so glad to see it picked up for Summer of Code! I should finish my 150MHz Oscilloscope Cape soon; it would pair great with this. (About $50 in parts for a two channel ~150MHz/150Msps scope; most of the cost is in the CMOS Parallel or LVDS ADC. It connects to the PRU which is responsible for clocking the data directly into DDR.)

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