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Got one soldered up yesterday, haven't tested it with any boosterpack hardware yet but I'll see about that this week.

 

Also showcasing another project which I'll start another thread about soon.  Don't have any more of them left but have a big OSHpark order on the way for that one...

 

 

First, BBB LaunchPad cape:

post-4-14264691106383_thumb.jpg

( http://spirilis.net/junk/beaglebone/bbblpv10/bbblpv10_soldered_top.jpg )

 

post-4-14264691106896_thumb.jpg

( http://spirilis.net/junk/beaglebone/bbblpv10/bbblpv10_soldered_bottom.jpg )

 

post-4-14264691107414_thumb.jpg

 

post-4-14264691107904_thumb.jpg

 

post-4-14264691108422_thumb.jpg

 

post-4-14264691108932_thumb.jpg

( http://spirilis.net/junk/beaglebone/bbblpv10/bbblpv10_installed_nrf24bpak.jpg )

 

 

 

 

 

Second, my solution to the FTDI problem.  A tiny FT230X board that friction-fits the connector and has its USB port angled slightly to allow the USB mini-B cable to slide right between the DC jack & RJ45:

post-4-14264691110008_thumb.jpg

 

post-4-14264691109451_thumb.jpg

 

You'll see one of the BBB LP pics above has this FTDI board installed with the cape overtop, thus allowing you access to the FTDI ttyO0 debug serial port even with a cape installed, thus allowing you to actually investigate issues with your kernel when you install some random cape that screws everything up :-)

 

This FTDI board does not supply power to the BBB btw, so you still need a power source or another USB cable to give it power.  I have an order of USB mini-B cables coming from an aliexpress vendor and I intend to sell the boards with a USB cable for convenience.

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I haven't read this full thread, but I did get a board for a few minutes today to play around. I haven't yet understood how everything is wired.  It seems like the analog pins are not yet connected on

I got 'em!   I must say, for a chinese PCB fabber Elecrow is freaking fast.

Touched up & added some images:   ( http://spirilis.net/junk/beaglebone/bbblpv10/bbblpv10_top.png )   ( http://spirilis.net/junk/beaglebone/bbblpv10/bbblpv10_bottom.png )   I am going to

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Hmm, another thought I had: For future cape designs I should look into putting a drill hole in the cape right over the S2 button so the user can easily go into uSD card boot mode.  You can usually reach in with a small screwdriver to hit the button from the side, but a hole overtop might be nicer (or maybe you could fit a narrow standoff in there for a better pushbutton...)

 

Also, this cape *should* be backwards compatible with the BBW.  It avoids using any of the reserved/already-used pins of the BBB which should make it compatible with the BBW too.

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  • 2 weeks later...

Is that the Elecrow black mask BTW? Noticed the slight messiness that RobG had around the OSHW logo

Yeah I think the problem there is the logo goes over some traces and isn't entirely on the GND plane, so frankly I think it's good they covered up that part cause in retrospect it's not a good idea to expose signal traces unnecessarily like that. Next revision the OSHW logo will be shrunk to fit on that local GND plane area.

 

Sent from my Galaxy Note II with Tapatalk

 

 

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Also want to add something important about the ADC on these things.

 

It's pretty much guaranteed that any boosterpacks relying on analogInput() or ADC functions won't work with this b/c the BeagleBone's ADC doesn't work at the same 3.3V level as the rest of its I/O, unlike the MSP430/Tiva.  It uses 1.8V levels.

 

Its ADC input pins are also dedicated, not shared with other I/O.  This cape exposes them using the inner left header (canonically defined as "analog input" pins per TI's BYOB wiki page) but it should be pointed out that if there are any Stellaris/Tiva/C2000 launchpad boosterpacks that utilize these inner-left pins for ADC functions they might not be compatible with this cape, because they're probably using 3.3V levels for their ADC circuits.  Using those on this cape will burn out the AIN pins on the BeagleBone permanently.  So be very very careful and double-check the schematic of a boosterpack before plugging it in.

 

The 1.8V analog reference voltage is exposed as the bottom-most pin on that inner-left header so boosterpacks specifically targeting this cape can be designed to use that 1.8V reference for voltage dividers et al.

 

All other digital I/O functions especially when using the outer headers (standard MSP430 LaunchPad compatible boosterpacks) should be compatible.

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Had a guy on IRC ask about access to these pics & design files without signing up.  I know @@bluehash likes to keep the pics et al restricted to members only, but for "open source hardware" stuff I think this guy has a point... If you have to provide personal information to a website just to d/l the files, is it really "open"?  I think it is, but I can respect the desire not to go through that.

 

So the point here is, I went ahead and reposted the design files & some pics on my webhost and provided hyperlinks in the posts in this thread.

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Had a guy on IRC ask about access to these pics & design files without signing up.  I know @@bluehash likes to keep the pics et al restricted to members only, but for "open source hardware" stuff I think this guy has a point... If you have to provide personal information to a website just to d/l the files, is it really "open"?  I think it is, but I can respect the desire not to go through that.

 

So the point here is, I went ahead and reposted the design files & some pics on my webhost and provided hyperlinks in the posts in this thread.

When the community is small it helps to register to download. If not, then the community would not grow at a required rate. It stays stagnant. Also.. you really don't need to give any personal info. A secondary email id is all that is needed if you don't want to give your personal info.  Info on the forum is free, provided by members. Requires 20 seconds to get registered.

 

In any case, I don't mind if you register or not. He needs to think that there are people contributing and managing the community. One registration helps.

 

Good to know that your board has got some interest.  :D

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I haven't read this full thread, but I did get a board for a few minutes today to play around. I haven't yet understood how everything is wired.  It seems like the analog pins are not yet connected on the board that I got.  Also, it seems some of the pins are tied to the eMMC and therefore can't be used with Black unless you boot from an SD card and disable the eMMC.

 

Check out the code and let me know your thoughts.  I'm going to start looking at the LCD interface next.

 

http://beagleboard.org/support/BoneScript/educationalBoosterPack/

 

The blue LED is tied to an eMMC pin.

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Hmm I need to double check that, I thought I avoided the eMMC and I2S pins...

Sent from my Galaxy Note II with Tapatalk
 

edit: Ah k, I totally misread the SRM before when I made my diptrace schematic component.  Correcting the object & gonna have to redo the LP.

Probably not doing anything with the AIN pins so I am going to leave them completely unconnected.  Considering that outside the scope of this board... (and of my engineering abilities atm lol, well, except maybe a simple voltage divider setup)

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ADC pins definitely won't work on the Educational Boosterpack since none of them go to the outer (MSP430 LaunchPad) headers due to the 1.8V limit there... I exposed them on the inner-left header but I am questioning the wisdom of that. If someone plugged in a Stellaris/Tiva/C2K boosterpack it would probably use 3.3V anyway and damage the Sitara. I did expose the 1V8 rail in the bottom pad of that header but TI doesn't seem to have any standard for that feature (no DVcc vs ARef distinguishing) in the boosterpack layout...

 

Sent from my Galaxy Note II with Tapatalk

 

 

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K, next revision...

J4 almost last 3 (not including the last one which was OK) now = 0_23, 1_15, 0_22

J2 former 1_6 now = 1_13

last 3 = 0_26, 1_12, 1_14

 

Should avoid the eMMC pins now.  Might rearrange them a bit (where appropriate) to make the routing easier at my discretion.

Leaving J3 unpopulated except the 5V and GND. (edit: Hmm, maybe I'll at least look since I'm sure TI carries some level converters that could work great here.)

Thanks for your help @@jkridner !  I'll let you guys know when this one is ready to send to the fab...

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Hmm I need to double check that, I thought I avoided the eMMC and I2S pins...

 

Sent from my Galaxy Note II with Tapatalk

 

edit: Ah k, I totally misread the SRM before when I made my diptrace schematic component.  Correcting the object & gonna have to redo the LP.

Probably not doing anything with the AIN pins so I am going to leave them completely unconnected.  Considering that outside the scope of this board... (and of my engineering abilities atm lol, well, except maybe a simple voltage divider setup)

 

For the analog components that are there on things like the Educational BoosterPack, a simple resistor ladder divider should work fine to scale down the voltage.  It would be nice to at least have an option like that.  I can give you an op-amp circuit that will scale 3.3V down to 1.8V.  For me it'd be really handy.

 

The cape identification EEPROM would also be very handy for allocating the pins and configuring drivers.

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