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What is stored at the second word space in _text section?


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I know that the first word is the address of the top of the stack. In startup_gcc.c file in the stellarisware projects, the address of the reset_isr subroutine is stored in the second word space in the _text section. In the objdump of the blinky.axf file, a value of 0x2d1 is stored at address 0x04 in _text section. But the reset_isr subroutine is stored at address 0x2d0. This is confusing me. Isn't a value of 0x2d0 supposed to be at address 0x04 in _text section? Please explain me where I am wrong. I have attached the objdump of blinky.axf here.

Akhils-MacBook-Pro:blinky akhil$ arm-none-eabi-objdump -d -s -x gcc/blinky.axf

gcc/blinky.axf: file format elf32-littlearm
gcc/blinky.axf
architecture: arm, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x000002d1

Program Header:
LOAD off 0x00008000 vaddr 0x00000000 paddr 0x00000000 align 2**15
filesz 0x00000320 memsz 0x00000320 flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x20000000 align 2**15
filesz 0x00000000 memsz 0x00000100 flags rw-
private flags = 5000002: [Version5 EABI] [has entry point]

Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00000320 00000000 00000000 00008000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .bss 00000100 20000000 20000000 00010000 2**2
ALLOC
2 .comment 00000070 00000000 00000000 00008320 2**0
CONTENTS, READONLY
3 .ARM.attributes 00000037 00000000 00000000 00008390 2**0
CONTENTS, READONLY
SYMBOL TABLE:
00000000 l d .text    00000000 .text
20000000 l d .bss    00000000 .bss
00000000 l d .comment    00000000 .comment
00000000 l d .ARM.attributes    00000000 .ARM.attributes
00000000 l df *ABS*    00000000 startup_gcc.c
000002c8 l F .text    00000002 NmiSR
000002ca l F .text    00000002 FaultISR
000002cc l F .text    00000002 IntDefaultHandler
000002ee l F .text    00000000 zero_loop
20000000 l O .bss    00000100 pulStack
00000000 l df *ABS*    00000000 blinky.c
00000000 l df *ABS*    00000000
00000320 g .text    00000000 _etext
20000100 g .bss    00000000 _ebss
20000000 g .bss    00000000 _bss
00000000 g .text    00000000 _text
0000026c g F .text    0000005c main
20000000 g .text    00000000 _data
20000000 g .text    00000000 _edata
00000000 g O .text    0000026c g_pfnVectors
000002d0 g F .text    00000048 ResetISR


Contents of section .text:
0000 00010020 d1020000 c9020000 cb020000 ... ............
0010 cd020000 cd020000 cd020000 00000000 ................
0020 00000000 00000000 00000000 cd020000 ................
0030 cd020000 00000000 cd020000 cd020000 ................
0040 cd020000 cd020000 cd020000 cd020000 ................
0050 cd020000 cd020000 cd020000 cd020000 ................
0060 cd020000 cd020000 cd020000 cd020000 ................
0070 cd020000 cd020000 cd020000 cd020000 ................
0080 cd020000 cd020000 cd020000 cd020000 ................
0090 cd020000 cd020000 cd020000 cd020000 ................
00a0 cd020000 cd020000 cd020000 cd020000 ................
00b0 cd020000 cd020000 cd020000 cd020000 ................
00c0 cd020000 cd020000 cd020000 cd020000 ................
00d0 cd020000 cd020000 cd020000 cd020000 ................
00e0 cd020000 cd020000 cd020000 cd020000 ................
00f0 cd020000 cd020000 cd020000 cd020000 ................
0100 cd020000 cd020000 cd020000 cd020000 ................
0110 cd020000 cd020000 cd020000 cd020000 ................
0120 cd020000 cd020000 cd020000 cd020000 ................
0130 cd020000 cd020000 cd020000 cd020000 ................
0140 00000000 00000000 00000000 00000000 ................
0150 cd020000 cd020000 cd020000 cd020000 ................
0160 00000000 00000000 00000000 00000000 ................
0170 00000000 00000000 00000000 00000000 ................
0180 00000000 00000000 00000000 00000000 ................
0190 00000000 00000000 00000000 00000000 ................
01a0 00000000 00000000 00000000 00000000 ................
01b0 cd020000 cd020000 cd020000 cd020000 ................
01c0 cd020000 cd020000 cd020000 cd020000 ................
01d0 cd020000 cd020000 cd020000 cd020000 ................
01e0 cd020000 cd020000 cd020000 cd020000 ................
01f0 cd020000 cd020000 cd020000 cd020000 ................
0200 cd020000 cd020000 cd020000 00000000 ................
0210 cd020000 cd020000 cd020000 cd020000 ................
0220 cd020000 cd020000 cd020000 cd020000 ................
0230 cd020000 cd020000 cd020000 cd020000 ................
0240 cd020000 cd020000 cd020000 cd020000 ................
0250 cd020000 cd020000 cd020000 cd020000 ................
0260 cd020000 cd020000 cd020000 124b2022 .............K "
0270 1a6082b0 1b68114a 01930823 1360c2f8 .`...h.J...#.`..
0280 1c310f4b 1a6842f0 08021a60 00220192 .1.K.hB....`."..
0290 01990c4a 914202d8 019a0132 f7e71a68 ...J.B.....2...h
02a0 22f00802 1a600023 0193019a 054b9a42 "....`.#.....K.B
02b0 e7d8019b 0133f7e7 08e10f40 00540240 .....3.....@.T.@
02c0 fc530240 3f0d0300 fee7fee7 fee70000 .S.@?...........
02d0 00230d4a 0d499818 884204d2 0c495958 .#.J.I...B...IYX
02e0 99500433 f5e70c48 0c494ff0 00028842 .P.3...H.IO....B
02f0 b8bf40f8 042bfff6 faaf064b 1a6842f4 ..@..+.....K.hB.
0300 70021a60 fff7b2bf 00000020 00000020 p..`....... ...
0310 20030000 88ed00e0 00000020 00010020 .......... ...
Contents of section .comment:
0000 4743433a 2028474e 5520546f 6f6c7320 GCC: (GNU Tools
0010 666f7220 41524d20 456d6265 64646564 for ARM Embedded
0020 2050726f 63657373 6f727329 20342e38 Processors) 4.8
0030 2e342032 30313430 37323520 2872656c .4 20140725 (rel
0040 65617365 29205b41 524d2f65 6d626564 ease) [ARM/embed
0050 6465642d 345f382d 6272616e 63682072 ded-4_8-branch r
0060 65766973 696f6e20 32313331 34375d00 evision 213147].
Contents of section .ARM.attributes:
0000 41360000 00616561 62690001 2c000000 A6...aeabi..,...
0010 05436f72 7465782d 4d340006 0d074d09 .Cortex-M4....M.
0020 020a0612 04140115 01170318 0119011a ................
0030 011b031e 042201 .....".

Disassembly of section .text:

00000000 <_text>:
0:    20000100     .word    0x20000100
4:    000002d1     .word    0x000002d1
8:    000002c9     .word    0x000002c9
c:    000002cb     .word    0x000002cb
10:    000002cd     .word    0x000002cd
14:    000002cd     .word    0x000002cd
18:    000002cd     .word    0x000002cd
    ...
2c:    000002cd     .word    0x000002cd
30:    000002cd     .word    0x000002cd
34:    00000000     .word    0x00000000
38:    000002cd     .word    0x000002cd
3c:    000002cd     .word    0x000002cd
40:    000002cd     .word    0x000002cd
44:    000002cd     .word    0x000002cd
48:    000002cd     .word    0x000002cd
4c:    000002cd     .word    0x000002cd
50:    000002cd     .word    0x000002cd
54:    000002cd     .word    0x000002cd
58:    000002cd     .word    0x000002cd
5c:    000002cd     .word    0x000002cd
60:    000002cd     .word    0x000002cd
64:    000002cd     .word    0x000002cd
68:    000002cd     .word    0x000002cd
6c:    000002cd     .word    0x000002cd
70:    000002cd     .word    0x000002cd
74:    000002cd     .word    0x000002cd
78:    000002cd     .word    0x000002cd
7c:    000002cd     .word    0x000002cd
80:    000002cd     .word    0x000002cd
84:    000002cd     .word    0x000002cd
88:    000002cd     .word    0x000002cd
8c:    000002cd     .word    0x000002cd
90:    000002cd     .word    0x000002cd
94:    000002cd     .word    0x000002cd
98:    000002cd     .word    0x000002cd
9c:    000002cd     .word    0x000002cd
a0:    000002cd     .word    0x000002cd
a4:    000002cd     .word    0x000002cd
a8:    000002cd     .word    0x000002cd
ac:    000002cd     .word    0x000002cd
b0:    000002cd     .word    0x000002cd
b4:    000002cd     .word    0x000002cd
b8:    000002cd     .word    0x000002cd
bc:    000002cd     .word    0x000002cd
c0:    000002cd     .word    0x000002cd
c4:    000002cd     .word    0x000002cd
c8:    000002cd     .word    0x000002cd
cc:    000002cd     .word    0x000002cd
d0:    000002cd     .word    0x000002cd
d4:    000002cd     .word    0x000002cd
d8:    000002cd     .word    0x000002cd
dc:    000002cd     .word    0x000002cd
e0:    000002cd     .word    0x000002cd
e4:    000002cd     .word    0x000002cd
e8:    000002cd     .word    0x000002cd
ec:    000002cd     .word    0x000002cd
f0:    000002cd     .word    0x000002cd
f4:    000002cd     .word    0x000002cd
f8:    000002cd     .word    0x000002cd
fc:    000002cd     .word    0x000002cd
100:    000002cd     .word    0x000002cd
104:    000002cd     .word    0x000002cd
108:    000002cd     .word    0x000002cd
10c:    000002cd     .word    0x000002cd
110:    000002cd     .word    0x000002cd
114:    000002cd     .word    0x000002cd
118:    000002cd     .word    0x000002cd
11c:    000002cd     .word    0x000002cd
120:    000002cd     .word    0x000002cd
124:    000002cd     .word    0x000002cd
128:    000002cd     .word    0x000002cd
12c:    000002cd     .word    0x000002cd
130:    000002cd     .word    0x000002cd
134:    000002cd     .word    0x000002cd
138:    000002cd     .word    0x000002cd
13c:    000002cd     .word    0x000002cd
    ...
150:    000002cd     .word    0x000002cd
154:    000002cd     .word    0x000002cd
158:    000002cd     .word    0x000002cd
15c:    000002cd     .word    0x000002cd
    ...
1b0:    000002cd     .word    0x000002cd
1b4:    000002cd     .word    0x000002cd
1b8:    000002cd     .word    0x000002cd
1bc:    000002cd     .word    0x000002cd
1c0:    000002cd     .word    0x000002cd
1c4:    000002cd     .word    0x000002cd
1c8:    000002cd     .word    0x000002cd
1cc:    000002cd     .word    0x000002cd
1d0:    000002cd     .word    0x000002cd
1d4:    000002cd     .word    0x000002cd
1d8:    000002cd     .word    0x000002cd
1dc:    000002cd     .word    0x000002cd
1e0:    000002cd     .word    0x000002cd
1e4:    000002cd     .word    0x000002cd
1e8:    000002cd     .word    0x000002cd
1ec:    000002cd     .word    0x000002cd
1f0:    000002cd     .word    0x000002cd
1f4:    000002cd     .word    0x000002cd
1f8:    000002cd     .word    0x000002cd
1fc:    000002cd     .word    0x000002cd
200:    000002cd     .word    0x000002cd
204:    000002cd     .word    0x000002cd
208:    000002cd     .word    0x000002cd
20c:    00000000     .word    0x00000000
210:    000002cd     .word    0x000002cd
214:    000002cd     .word    0x000002cd
218:    000002cd     .word    0x000002cd
21c:    000002cd     .word    0x000002cd
220:    000002cd     .word    0x000002cd
224:    000002cd     .word    0x000002cd
228:    000002cd     .word    0x000002cd
22c:    000002cd     .word    0x000002cd
230:    000002cd     .word    0x000002cd
234:    000002cd     .word    0x000002cd
238:    000002cd     .word    0x000002cd
23c:    000002cd     .word    0x000002cd
240:    000002cd     .word    0x000002cd
244:    000002cd     .word    0x000002cd
248:    000002cd     .word    0x000002cd
24c:    000002cd     .word    0x000002cd
250:    000002cd     .word    0x000002cd
254:    000002cd     .word    0x000002cd
258:    000002cd     .word    0x000002cd
25c:    000002cd     .word    0x000002cd
260:    000002cd     .word    0x000002cd
264:    000002cd     .word    0x000002cd
268:    000002cd     .word    0x000002cd

0000026c <main>:
26c:    4b12     ldr    r3, [pc, #72]    ; (2b8 <main+0x4c>)
26e:    2220     movs    r2, #32
270:    601a     str    r2, [r3, #0]
272:    b082     sub    sp, #8
274:    681b     ldr    r3, [r3, #0]
276:    4a11     ldr    r2, [pc, #68]    ; (2bc <main+0x50>)
278:    9301     str    r3, [sp, #4]
27a:    2308     movs    r3, #8
27c:    6013     str    r3, [r2, #0]
27e:    f8c2 311c     str.w    r3, [r2, #284]    ; 0x11c
282:    4b0f     ldr    r3, [pc, #60]    ; (2c0 <main+0x54>)
284:    681a     ldr    r2, [r3, #0]
286:    f042 0208     orr.w    r2, r2, #8
28a:    601a     str    r2, [r3, #0]
28c:    2200     movs    r2, #0
28e:    9201     str    r2, [sp, #4]
290:    9901     ldr    r1, [sp, #4]
292:    4a0c     ldr    r2, [pc, #48]    ; (2c4 <main+0x58>)
294:    4291     cmp    r1, r2
296:    d802     bhi.n    29e <main+0x32>
298:    9a01     ldr    r2, [sp, #4]
29a:    3201     adds    r2, #1
29c:    e7f7     b.n    28e <main+0x22>
29e:    681a     ldr    r2, [r3, #0]
2a0:    f022 0208     bic.w    r2, r2, #8
2a4:    601a     str    r2, [r3, #0]
2a6:    2300     movs    r3, #0
2a8:    9301     str    r3, [sp, #4]
2aa:    9a01     ldr    r2, [sp, #4]
2ac:    4b05     ldr    r3, [pc, #20]    ; (2c4 <main+0x58>)
2ae:    429a     cmp    r2, r3
2b0:    d8e7     bhi.n    282 <main+0x16>
2b2:    9b01     ldr    r3, [sp, #4]
2b4:    3301     adds    r3, #1
2b6:    e7f7     b.n    2a8 <main+0x3c>
2b8:    400fe108     .word    0x400fe108
2bc:    40025400     .word    0x40025400
2c0:    400253fc     .word    0x400253fc
2c4:    00030d3f     .word    0x00030d3f

000002c8 <NmiSR>:
2c8:    e7fe     b.n    2c8 <NmiSR>

000002ca <FaultISR>:
2ca:    e7fe     b.n    2ca <FaultISR>

000002cc <IntDefaultHandler>:
2cc:    e7fe     b.n    2cc <IntDefaultHandler>
    ...

000002d0 <ResetISR>:
2d0:    2300     movs    r3, #0
2d2:    4a0d     ldr    r2, [pc, #52]    ; (308 <zero_loop+0x1a>)
2d4:    490d     ldr    r1, [pc, #52]    ; (30c <zero_loop+0x1e>)
2d6:    1898     adds    r0, r3, r2
2d8:    4288     cmp    r0, r1
2da:    d204     bcs.n    2e6 <ResetISR+0x16>
2dc:    490c     ldr    r1, [pc, #48]    ; (310 <zero_loop+0x22>)
2de:    5859     ldr    r1, [r3, r1]
2e0:    5099     str    r1, [r3, r2]
2e2:    3304     adds    r3, #4
2e4:    e7f5     b.n    2d2 <ResetISR+0x2>
2e6:    480c     ldr    r0, [pc, #48]    ; (318 <zero_loop+0x2a>)
2e8:    490c     ldr    r1, [pc, #48]    ; (31c <zero_loop+0x2e>)
2ea:    f04f 0200     mov.w    r2, #0

000002ee <zero_loop>:
2ee:    4288     cmp    r0, r1
2f0:    bfb8     it    lt
2f2:    f840 2b04     strlt.w    r2, [r0], #4
2f6:    f6ff affa     blt.w    2ee <zero_loop>
2fa:    4b06     ldr    r3, [pc, #24]    ; (314 <zero_loop+0x26>)
2fc:    681a     ldr    r2, [r3, #0]
2fe:    f442 0270     orr.w    r2, r2, #15728640    ; 0xf00000
302:    601a     str    r2, [r3, #0]
304:    f7ff bfb2     b.w    26c <main>
308:    20000000     .word    0x20000000
30c:    20000000     .word    0x20000000
310:    00000320     .word    0x00000320
314:    e000ed88     .word    0xe000ed88
318:    20000000     .word    0x20000000
31c:    20000100     .word    0x20000100
Akhils-MacBook-Pro:blinky akhil$
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Hi,

Nothing is wrong, all is perfect as it should be. This is the usual behaviour of Cortex-Mx micros, where the interrupt routines (all, including reset_isr) gets an odd address when placed into interrupt vector routines, for signalling the fact the micro should use thumb(2) instructions, and not original ARM.

It would be an error to get even address in interrupt vector, and that would lead to interrupt fault.

L

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