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Help: SDI and SQI interfaces with LM4F120H5QR?

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The 23LC1024 1 Mbit SPI SRAM module from Microchip features SDI and SQI interfaces.



The 23A1024/23LC1024 also supports SDI (Serial Dual) and SQI (Serial Quad) mode of operation when used with compatible master devices. As a convention for SDI mode of operation, two bits are entered per clock using the SIO0 and SIO1 pins. Bits are clocked MSB first.


For SQI mode of operation, four bits of data are entered per clock, or one nibble per clock. The nibbles are clocked MSB first. 


As the clock rate can go up to 20 MHz, SDI —with 2 lines— doubles and SQI —with 4 lines— quadruples the flow of data.


How to implement those interfaces on the MSP430G2553 and LM4F120H5QR?



Reference: http://ww1.microchip.com/downloads/en/DeviceDoc/25142A.pdf

Same post on http://forum.43oh.com/topic/3943-help-sdi-and-sqi-interfaces-on-msp430g2553/

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