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[Energia Library] Stellaris Launchpad FatFs Energia library

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Update to support the SPI driver and different SSI modules:

- FatFs.begin(cs_pin) -> defaults to SSI2 and maximum SPI clock

- FatFs.begin(cs_pin, clock_divider) -> SSI2 and SPI clock is divided by clock_divider.

- FatFs.begin(cs_pin, clock_divider, module) -> SPI clock is divided by clock_divider, new SSI module selection

- inherited print functions ( can be enabled in ffconf.h )

 

Pin 9 is used as CS inside the SPI library and it is toggled at each byte transferred so it can't be used by FatFs.

I made some tests with CS control disabled inside the SPI lib and the transfer speed increases by ~50%.

 

If the card can't be initialized, a possible solution is a 1K pull-up resitor from MISO to VDD.

 

Because this library doesn't use low level access to hardware it shoul be compatible with further boards supportded by Energia (with enough RAM).

 

Calin

 

[EDIT]  corrected the speed test example

 

So reusing the SPI library as-is costs 50% in performance and wastes a GPIO? Suggests to me that SPI could use some refactoring love. Maybe split out a superclass for clients like FatFs and call into it from the existing class? 

 

Comments?

Steve

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Hi Grant,

Try to add a pull-up resitor of 1K to MISO pin. The original driver enables the weak pull-up for MISO, but in the the Energia SPI lib it is not enabled. You can also try to set the MISO pin with pinMode(MISO, INPUT_PULLUP) before SPI.begin.

 

Regards,

Calin

 

@@calinp and @@OzGrant

 

I'm experiencing the same issue with MISO from SPI port 0 and tried both of the suggested solutions, alas with no result.

 

The logic analyser shows a flat HIGH signal.

 

Have you been luckier with a working SPI(0) MISO? 

 

Thank you for your answers, so I can open an issue at the Energia repository.

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Just in case, the Stellaris® LM4F120H5QR Rev A1/A3/B0 Errata reads on top of page 27:

 

 

 

GPIO
9.1 Some GPIO register bits default to the incorrect state Description:
The AFSEL bits for the following pins are set at reset, resulting in the pins defaulting to their alternate function:
This error in pin functionality may create pin conflict during any type of reset with the following signals:
 
Signal PA4
Function SSI0Rx
I/O Input
Level Tristate

 

and proposes as workaround

 

 

Workaround:

To reconfigure the pins to their intended reset state (GPIO Input, GPIODEN =0), software must clear the corresponding bits in the GPIOAFSEL and GPIODEN registers for the associated pins. For pins PD7 and PF0, software must clear the corresponding AFSEL bits using the register commit control procedures described in the Commit Control section in the General-Purpose Input/Outputs chapter in the data sheet.

Note that PD7 and PF0 should be grounded, if possible, to prevent triggering an NMI. If that is not possible, an NMI handler must be implemented in case a High level is applied to PD7 or PF0 before they can be reconfigured.

For PD7, the PMC7 assignment of 0x3 is not valid, so it does not cause any issues. However, for PF0, the PMC0 assignment of 0x3 specifies CAN0Rx. If the system design requires CAN0Rx to be on another pin, the PMC0 field for Port F must be assigned to another function or cleared.

Silicon Revision Affected:

A1

Fixed:

Fixed on A3. 

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No luck, same MISO issue with SPI3 port.

 

Summary:

 

  • SPI=SPI2 and SPI1 work fine
  • Issues with SPI0 and SPI3: MISO not ok, even with pull-up resistor or with digitalMode(pinMISO, INPUT_PULLUP) as suggested

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Hi Rei,

I have seen some erratic behavior when using SPI0, but I assumed it is because of my wiring and not driving the pins with enough current. The first library I posted used a SPI driver for the SD card taken from the Stelarisware and it worked fine.

Also I checked the library only on SPI 0 and 2.

 

Given your detailed analysis on this problem I think it is an initialisation problem that must be addressed to the Energia developers.

 

Thank you for your effort.

Calin

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I am afraid this wrapper doesn't have mentioned functionality. But normal FatFs library can. I use it with Energia without any problems. I use diskio.c from one of the StellarisWare examples, modified to suit my connections. However, unmodified FatFs library requires using a timer.

The SDFat library also works with Energia(some code changes are needed), but it is slower because of using things like digitalWrite.

 

Attached file contains fatfs and SDFat from my libraries directory. They worked for me, but my SD card is connected to SSI3 and this is hardcoded. Wouldn't be hard to modify, I think.

 

I can also share my working sketch, if needed.

libraries.7z

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