biza 0 Posted November 20, 2014 Share Posted November 20, 2014 Fellow s I need some help, with my msp430g2553.I want decrease the sample rate can anyone help me Biza, Sent from my iPad using Tapatalk Quote Link to post Share on other sites
enl 227 Posted November 20, 2014 Share Posted November 20, 2014 More info needed to address this... What rate are you looking for? What are you using as ADC clock? What other modules are in use (do you have a free timer, for example)? Do you really need periodic sampling, or will demand sampling do? Quote Link to post Share on other sites
biza 0 Posted November 22, 2014 Author Share Posted November 22, 2014 So I am trying to make a ambulatory ecg, and I need reduce the sample rate from 200ksps to 100 or 200 sps (100 or 200Hz). So i need register some data acquisition provided from heart each second Biza, Sent from my iPad using Tapatalk Quote Link to post Share on other sites
biza 0 Posted December 14, 2014 Author Share Posted December 14, 2014 can help me? Biza, Sent from my iPad using Tapatalk Quote Link to post Share on other sites
enl 227 Posted December 14, 2014 Share Posted December 14, 2014 Short overview: There are several things that come into play with the timing a.) the internal ADC clock rate and ADC hardware, which limits you to a practical guarenteed sample rate of about 200KHz. This is due to the required number of clock cycles for an ADC conversion, the tolerance on the internal ADC clock, and the analog circuitry properties. b.) How often YOU request the ADC do a conversion. To sample at a given low rate, the structure I would use is, roughly: Set up a timer to interrupt at the desired sample rate. The interrupt handler requests the ADC to do a single conversion. Set up the ADC to do single conversion on the desired input channel and interrupt when complete The ADC handler gets he converted value and does whatever is needed to get your main loop to handle it (sets a flag; takes the device out of LPM; whatever) The main loop actually handles the data. The interrupts do minimal work: initiate a reading in the timed interrupt and get the data/signal the main to deal with it in the ADC handler. There will be little jitter on the acquisitions, as the interrupt latency for the timed interrupt is the principal issue, and is typically less than a dozen clocks. If there isn't a lot of processing to do, you might even get away with 32KHz xtal for your main clock, rather than the DCO, and keep power low while avoiding the wake up latency from LPM. Probably not needed for this application, as the timing isn'y likely to be that critical. tripwire 1 Quote Link to post Share on other sites
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