SPI 4-Pin Mode and TX Interrupt won't work, in 3-Pin Mode it works

[leomar01 8]

Hello,

 

after years of abstinence I'm back to playing with TI hardware. 

I'm using the eZ430-RF2500 Development Tool with CCS and Grace.

While implementing a ringbuffer for SPI I ran into an unexpected behaviour. (using USCI_B )

 

By writing a byte to UCB0TXBUF the UCB0TXIFG Interrupt should fire, right?

 

Ok, I made a minimal example with Grace, only clocks and the SPI interface configured.

I placed a _NOP(); in the ISR and a breakpoint on it.

 

In main I add the line 

UCB0TXBUF = 'a';

When the SPI interface is configured as 3-Pin it does halt at the breakpoint.

If I configure it as 4-Pin it never reaches the ISR.

 

Can someone explain that behaviour?

 

Regards,

Leo

 

PS: I've attached my testproject

Testprojekt3.zip

[oPossum 1,082]

Make sure UCxSTE is the proper level to allow transmission. 4 pin mode is for multi-master operation and is very rarely used.

[leomar01 8]

Wow thanks for the quick answer oPossum

 

I think I've misunderstood the purpose of UCxSTE.

On the eZ430-RF2500T target board UCB0STE (Port 3.0) is connected to CSn of the CC2500.

Therefore I thought UCxSTE is some kind of auto hardware controlled chip select that's being driven low when transmitting.

 

Ok, if got it right, I have to use 3-pin mode and use P3.0 as a normal output that I manually drive low during communication with the attached cc2500, right?

 

Leo

[oPossum 1,082]

Yes, you have to use 3 wire mode and a normal IO pin to select your SPI slave device.

[KatiePier 73]

Just as a side-note for others searching for help: if you get one of the parts that has the new eUSCI module (FR57xx, FR59xx, some of the F5xx/6xx parts) it has an option to set the 4th pin up as a true chip select function instead of Slave-Transmit-Enable (STE), so that you don't have to do it on your own with a separate IO anymore.

 

www.ti.com/lit/pdf/slaa522 USCI to eUSCI migration guide

 

Regards,

Katie