leomar01 8 Posted June 23, 2014 Share Posted June 23, 2014 Hello, after years of abstinence I'm back to playing with TI hardware. I'm using the eZ430-RF2500 Development Tool with CCS and Grace. While implementing a ringbuffer for SPI I ran into an unexpected behaviour. (using USCI_B ) By writing a byte to UCB0TXBUF the UCB0TXIFG Interrupt should fire, right? Ok, I made a minimal example with Grace, only clocks and the SPI interface configured. I placed a _NOP(); in the ISR and a breakpoint on it. In main I add the line UCB0TXBUF = 'a'; When the SPI interface is configured as 3-Pin it does halt at the breakpoint. If I configure it as 4-Pin it never reaches the ISR. Can someone explain that behaviour? Regards, Leo PS: I've attached my testproject Testprojekt3.zip Quote Link to post Share on other sites
oPossum 1,083 Posted June 23, 2014 Share Posted June 23, 2014 Make sure UCxSTE is the proper level to allow transmission. 4 pin mode is for multi-master operation and is very rarely used. KatiePier and leomar01 2 Quote Link to post Share on other sites
leomar01 8 Posted June 23, 2014 Author Share Posted June 23, 2014 Wow thanks for the quick answer oPossum I think I've misunderstood the purpose of UCxSTE. On the eZ430-RF2500T target board UCB0STE (Port 3.0) is connected to CSn of the CC2500. Therefore I thought UCxSTE is some kind of auto hardware controlled chip select that's being driven low when transmitting. Ok, if got it right, I have to use 3-pin mode and use P3.0 as a normal output that I manually drive low during communication with the attached cc2500, right? Leo Quote Link to post Share on other sites
oPossum 1,083 Posted June 23, 2014 Share Posted June 23, 2014 Yes, you have to use 3 wire mode and a normal IO pin to select your SPI slave device. KatiePier and leomar01 2 Quote Link to post Share on other sites
KatiePier 73 Posted June 26, 2014 Share Posted June 26, 2014 Just as a side-note for others searching for help: if you get one of the parts that has the new eUSCI module (FR57xx, FR59xx, some of the F5xx/6xx parts) it has an option to set the 4th pin up as a true chip select function instead of Slave-Transmit-Enable (STE), so that you don't have to do it on your own with a separate IO anymore. www.ti.com/lit/pdf/slaa522 USCI to eUSCI migration guide Regards, Katie spirilis, roadrunner84 and oPossum 3 Quote Link to post Share on other sites
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