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Doubt in code example


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Hello,
I am new to MSP430 devices and learning CCS to program it. I downloaded the following code to my MSP430F5438A contoller to check its behavior. It says LED gets ON when voltage @ P6.0 is greater than half of AVcc.
AVcc is 3.3V, so LED should glow when P6.0 > 1.65. But LED doesn't glow until the voltage reaches to 3.6V.
Please help me out with this.
 

 

 

 

// MSP430F543xA Demo - ADC12_A, Sample A0, Set P1.0 if A0 > 0.5*AVcc
//
// Description: A single sample is made on A0 with reference to AVcc.
// Software sets ADC12SC to start sample and conversion - ADC12SC
// automatically cleared at EOC. ADC12 internal oscillator times sample (16x)
// and conversion. In mainloop waits in LPM0 to save power until ADC12
// conversion complete, ADC12_ISR will force exit from LPM0 in Mainloop on
// reti. If A0 > 0.5*AVcc, P1.0 set, else reset.
//

 

 

// M Morales
// Texas Instruments Inc.
// June 2009
// Built with CCE Version: 3.2.2 and IAR Embedded Workbench Version: 4.2
//******************************************************************************

#include <msp430.h>
int temp;
int main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
ADC12CTL0 = ADC12SHT02 + ADC12ON; // Sampling time, ADC12 on
ADC12CTL1 = ADC12SHP; // Use sampling timer
ADC12IE = 0x01; // Enable interrupt
ADC12CTL0 |= ADC12ENC;

P6SEL |= 0x01; // P6.0 ADC option select
P1DIR |= BIT0; // P1.0 output

__delay_cycles(10000);
    
while (1)
{
ADC12CTL0 |= ADC12SC; // Start sampling/conversion

__bis_SR_register(LPM0_bits + GIE); // LPM0, ADC12_ISR will force exit
__no_operation(); // For debugger
}
}

#pragma vector = ADC12_VECTOR
__interrupt void ADC12_ISR(void)
{
switch(__even_in_range(ADC12IV,34))
{
case 0: break; // Vector 0: No interrupt
case 2: break; // Vector 2: ADC overflow
case 4: break; // Vector 4: ADC timing overflow
case 6: // Vector 6: ADC12IFG0
temp = ADC12MEM0;
if (ADC12MEM0 >= 0x7ff) // ADC12MEM = A0 > 0.5AVcc?
P1OUT |= BIT0; // P1.0 = 1
else
P1OUT &= ~BIT0; // P1.0 = 0

__bic_SR_register_on_exit(LPM0_bits); // Exit active CPU
break;
case 8: break; // Vector 8: ADC12IFG1
case 10: break; // Vector 10: ADC12IFG2
case 12: break; // Vector 12: ADC12IFG3
case 14: break; // Vector 14: ADC12IFG4
case 16: break; // Vector 16: ADC12IFG5
case 18: break; // Vector 18: ADC12IFG6
case 20: break; // Vector 20: ADC12IFG7
case 22: break; // Vector 22: ADC12IFG8
case 24: break; // Vector 24: ADC12IFG9
case 26: break; // Vector 26: ADC12IFG10
case 28: break; // Vector 28: ADC12IFG11
case 30: break; // Vector 30: ADC12IFG12
case 32: break; // Vector 32: ADC12IFG13
case 34: break; // Vector 34: ADC12IFG14
default: break;
}
}

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