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Help: SDI and SQI interfaces on MSP430G2553?


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The 23LC1024 1 Mbit SPI SRAM module from Microchip features SDI and SQI interfaces.

 

 

The 23A1024/23LC1024 also supports SDI (Serial Dual) and SQI (Serial Quad) mode of operation when used with compatible master devices. As a convention for SDI mode of operation, two bits are entered per clock using the SIO0 and SIO1 pins. Bits are clocked MSB first.

 

For SQI mode of operation, four bits of data are entered per clock, or one nibble per clock. The nibbles are clocked MSB first. 

 

As the clock rate can go up to 20 MHz, SDI

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Yes, bit-banging seems the solution, but I don't want to spend more time coding and decoding the bytes to and from the 2 or 4 lines than using a plain mono-canal SPI.

 

On the SDI configuration, the first line gets the even bits while the second line gets the odd bits.

 

On the SQI configuration, first line gets bits 0 and 4, second line bits 1 and 5, third line bits 2 and 6 and forth line bits 3 and 7.

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Seems simple enough, especially SQI where you just make sure Px.0 is the first line, Px.1 second, etc... then do something like:

PxOUT = byte;

<strobe clock>

PxOUT = byte >> 4;

<strobe clock>

or whatever... That might actually work best on a G2553 PW28 with PORT3 dedicated to the I/O lines somehow.

But yeah, somehow I believe the code/instruction overhead would make it less worthwhile than using SPI at SMCLK=MCLK.

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