ADC10 overclocking

[M-atthias 50]

Sometimes there are questions regarding overclocking of the ADC10 analog-digital converter.

Today, I did some measurements for which I connected a Hameg HM8150 function generator to P1.5 of a MSP430G2553 in a plain Launchpad with 3.55V Vcc.

I used a sine signal of 0.3V amplitude with 0.5V offset of 10 kHz and 100kHz, ADC was configured to sample 85 points with 4 ticks sample-and-hold-time in free running repeat-single-channel mode with internal 2.5V reference voltage. Clock has been ADC10OSC, 8MHz DCO MCLK or 16 MHz DCO MCLK (100kHz signal only).

Attached you find the results. Two runs have been manually copied into every file.

Although 16MHz is far beyond specification of normal ADC10 operation, to my surprise it seems usable and should be explored further.

Matthias

Sine 10kHz 0.5V+-0.3V ADC10OSC 2.5V Ref.txt

Sine 10kHz 0.5V+-0.3V 8 MHz MCLK 2.5V Ref.txt

Sine 100kHz 0.5V+-0.3V ADC10OSC 2.5V Ref.txt

Sine 100kHz 0.5V+-0.3V 8 MHz MCLK 2.5V Ref.txt

Sine 100kHz 0.5V+-0.3V 16 MHz MCLK 2.5V Ref.txt

Sine 100kHz 0.5V+-0.3V 16 MHz MCLK 2.5V Ref again.txt

[ILAMtitan 86]

These are pretty cool results.  Did you happen to collect accuracy data as well?

This high sample rate could be used for some interesting DSP like applications.

[simpleavr 399]

@@M-atthias are u doing a oscope toy? it would be really interesting and fun to do.

 

if so, how do u envisage the max frequency this mechanism can achieve. say for fast uart (38400) and graphic lcd (nokia xxx).

[simpleavr 399]

i took the liberty to visualize the data... perl + excel, ....

 

not too bad to sample 100khz.

[M-atthias 50]

For accuracy measurements proper analog decoupling would be necessary...

An oscilloscope toy really would be nice ! But, don't tell, I had some other thing in mind: I would like to frequency lock DCO with 17 MHz to a 32768 Hz watch crystal to get stable 1 Msps sample rate (maybe possible) and then try to receive longwave 100 kHz Loran-C radio navigation signals on the fly. Wish me luck :-)

Matthias

PS: Thank you for the fine image ! I did simple visualisation for myself with http://www.gnuplot.info/
 

[yyrkoon 250]

Random post. If you dont know why, dont ask

[jpnorair 340]

I had some other thing in mind: I would like to frequency lock DCO with 17 MHz to a 32768 Hz watch crystal to get stable 1 Msps sample rate (maybe possible) and then try to receive longwave 100 kHz Loran-C radio navigation signals on the fly. Wish me luck

Haha! I was reading your topic and I was thinking, "a 25MHz MSP might be suitable for phase demodulation in the LowFER band."

 

On the contrary, though, I have used the ADC12 unit over-clocked to the limit, with maximum loading, as an excellent true-random-number generator (yes, I've tested the entropy). You can use the internal temp sensor or a floating pin for that.

 

Here is the code for that (also: github link). This variant uses a floating pin. Considering your findings, it might be a good idea to epoxy the chip if you are doing something really secure, and the TRNG is being used for crypto.

void platform_rand(ot_u8* rand_out, ot_int bytes_out) {
/// This random number generator is quite fast.  A 128 bit number can be
/// generated in less than 50us, typically.

#ifndef OT_GWNADC_BITS
#   define OT_GWNADC_BITS 8
#endif

#ifdef OT_GWNADC_PINNUM
#   undef OT_GWNADC_PIN
#else
#   warn "OT_GWNADC_PINNUM is not defined in the board configuration header."
#   define OT_GWNADC_PINNUM 0
#   undef OT_GWNADC_PIN
#endif

    /// Open Floating Input pin
#   define OT_GWNADC_PIN (1 << OT_GWNADC_PINNUM)
    OT_GWNADC_PORT->DDIR  &= ~OT_GWNADC_PIN;
    OT_GWNADC_PORT->REN   &= ~OT_GWNADC_PIN;

    /// 1. Set-up ADC: The trick to this implementation is to drive the sampling
    ///    timer MUCH faster than it is supposed to run, so that it just produces
    ///    garbage data.  The garbage data turns-out to be quite random, even to
    ///    the 8 LSBs of the 12 bit capture.  If you reduce the clock frequency,
    ///    you might want to change the OT_GWNADC_BITS to a lower number.
    ADC->CTL0   = 0;
    ADC->CTL0   = ADC_CTL0_SHT0_4 | ADC_CTL0_MSC | ADC_CTL0_ON;
    ADC->CTL1   = ADC_CTL1_START(0) | ADC_CTL1_SHP | ADC_CTL1_SSEL_MCLK | ADC_CTL1_CONSEQ_SINGLE;
    ADC->CTL2   = ADC_CTL2_TCOFF + ADC_CTL2_RES_MAX;
    ADC->MCTL0  = OT_GWNADC_PINNUM;
    ADC->CTL0  |= ADC_CTL0_ENC;

    /// 2. Turn-on Zener noisemaker, if enabled by board
#   ifdef OT_GWNZENER_PORT
        OT_GWNZENER_PORT->DOUT |= OT_GWNZENER_PIN;
#   endif

    /// 3. Do Conversion!  Loop until the required number of bytes are produced.
    ///    The random bytes are produced by shifting-in the least-significant
    ///    sections of each sample (exactly how many bits is board-defined).
    while (--bytes_out >= 0) {
        ot_u8 reg;
#       if (OT_GWNADC_BITS == 8)
            //Special case for direct synthesis of random bytes.
            ADC->CTL0  |= ADC_CTL0_SC;  //start conversion
            while (ADC->CTL1 & ADC_CTL1_BUSY);
            reg = (ot_u8)ADC->MEM0;

#       else
            ot_u8 shifts;
            shifts = ((8+(OT_GWNADC_BITS-1)) / OT_GWNADC_BITS);
            while (shifts-- != 0) {
                ADC->CTL0  |= ADC_CTL0_SC;  //start conversion
                while (ADC->CTL1 & ADC_CTL1_BUSY);
                reg   <<= OT_GWNADC_BITS;
                reg    |= ((1<<OT_GWNADC_BITS)-1) & ADC->MEM0;
            }
#       endif
        
        *rand_out++ = reg;
    }

    ///5. Shut down ADC, turn-off Zener (if enabled), turn-off pin (if enabled)
    ADC->CTL0              = 0;
    OT_GWNADC_PORT->DDIR  |= OT_GWNADC_PIN;
    OT_GWNADC_PORT->DOUT  &= ~OT_GWNADC_PIN;

#   ifdef OT_GWNZENER_PORT
        OT_GWNZENER_PORT->DOUT &= ~OT_GWNZENER_PIN;
#   endif
}

[M-atthias 50]

@jpnorair:

You laugh proved to be right, even the G2955 has too less RAM to accumulate over one cycle of the GRI 7499 Sylt chain which is most interesting for me. With heavy math, memory usage can be reduced further, but for that there is hardly enough computing power available. Tricky.

While searching around, I found this Loran-C receiver project done on an Analog Devices ARM:
Description:
http://phk.freebsd.dk/AducLoran/AducLoran-0.3.pdf
Source:
http://phk.freebsd.dk/AducLoran/

Matthias

PS: For fast data aquisition on an oscilloscope toy, printer port in ECP mode would be my first try.
 

[JWoodrell 285]

you can use an external flash chip to store the data, just stream it as you read the ADC.

 

these support block (32K) and sector (4K) erase operations, so you only HAVE to deal with 4K at a time, and with the G2553's 16K memory that is at least theoretically possible?  as you just erase in bulk then stream new data into place without caring what used to be there.

 

http://www.digikey.com/scripts/dksearch/dksus.dll?pv16=6548&pv16=7409&pv16=12133&pv16=3819&FV=ffec78dd%2Cfff40027%2Cfff80434%2Cfffc0096&mnonly=0&newproducts=0&ColumnSort=0&page=1&stock=1&quantity=0&ptm=0&fid=0&pageSize=25

 

 

1MB chip is only $0.75  and a 64MB chip is $4.75

 

just thinking out loud, I may tinker with the oscilloscope toy idea once I finish my hybrid controller project.

[jpnorair 340]

I think it is mainly a RAM issue.  For what it is worth, ARM Cortex-M is better for this sort of thing.  It has a multiply-accumulate block in the ALU which is a requirement for non-trivial DSP, and most implementations also have DMAs that can operate completely in parallel with the CPU.

[M-atthias 50]

Happy new year !

Loran-C radio navigation now runs on STM32F407 - thank you for the hint. As this will be a bit off-topic here I announced it on Stellarisiti:

http://forum.stellarisiti.com/topic/1807-loran-c-radio-navigation/

Matthias