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LaunchFET: Tag connect for launchpad


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I noticed the spacing issues too, although I managed to get it to work on my board with 0.2mm traces (7.8mils) without tripping the DRC.  I'll see soon how the legs are... hoping it's workable 'cause the board I have in mind won't have that much room behind it for fitting a pair of needle-nose.

 

So what is your secret.  I'm using the tag-connect supplied footprint (with 'holes') and even with a 6 mil trace centered perfectly between two holes, it still trips the DRC.

 

post-28692-0-60837900-1399221267_thumb.png

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Wow, I'd never heard of TagConnect. But I wanted something exactly like it. So I bought $10 worth of pogopins (50pcs), and drafted up a very quick 4 pin pad layout. My boards arrived today.   This

Ordering 6 of these, will send @@bluehash 5 of them after I confirm they work-     OSHpark gerbers: OSH_TC2030_eZFET_Adapter_v2_0.zip   DipTrace Schematic (PDF): DipTrace Schematic - TC2030_e

From the dozen or so uses of mine, it hasn't failed to connect once. The stainless guide pins seem suitable enough to protect the pogo pins from accidental bending. Can't say about the clip since I

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From the dozen or so uses of mine, it hasn't failed to connect once. The stainless guide pins seem suitable enough to protect the pogo pins from accidental bending. Can't say about the clip since I don't have one, but the legged version works well.

 

The clip probably works fine it's just they wear out after a while I believe.

 

Sent from my Galaxy Note II with Tapatalk 4

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I like them enough to start integrating them into my own projects.  The cables are solid quality and I have yet to have an issue with one (or know someone who has had an issue with one).  I would say the reliability of the cable/footprint is much better than the reliability of using a pin header.

 

If you are planning on doing a lot of programming/debugging, then I would just buy two cables... with and without legs.  Use the leg cable for debugging to keep it in place, then switch to the NL cable when it's time to mass program boards. 

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If you are planning on doing a lot of programming/debugging, then I would just buy two cables... with and without legs.  Use the leg cable for debugging to keep it in place, then switch to the NL cable when it's time to mass program boards. 

 

Well, the problem with the legged version is that the holes take up so much board space. My main motivation is lack of board space, so I'd much rather stay with the -NL version if possible.

 

Thanks for your advice

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  • 2 weeks later...

Here is a programmer, if anyone doesn't like the bulk that various adapters create. Will be ordered with my next fab order :D

 

post-274-0-21366000-1400174774_thumb.png

 

At a quick run with Altium's BOM (I spent the time embedding digikey references for all the parts this time.) The cost for one off is ~$14 not including board cost.

So not very practical since the 5528LP that the FET is based off is only $12 :P

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  • 2 weeks later...

Well, it seems that the TagConnect header is just within my capabilities of home PCB etching. The alignment of the locator pins is a bit out but it seems good enough.

 

post-317-0-94602100-1401049492_thumb.png post-317-0-76290900-1401049171_thumb.png post-317-0-88053500-1401049190_thumb.png

 

It couldn't get CCS to recognise the device so I thought I'd screwed it up, but it seems that the header isn't the problem. The board is a MSP430AFE252 breakout and connecting directly from the FET430UIF to the pin headers doesn't work either (but using a G2 launchpad does). I think the FET430UIF - or my use of it - is the problem but I'm not sure why yet. It got it on eBay and haven't used it before so it could be suspect. [EDIT: See two posts below. My TEST/SBWTCK connection isn't right on the TagConnect header.]

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That's a very professional looking board. Did you do the soldermask with a special flim?

 

Also I just thought I'd point out that your footprint isn't compatible with Spirilis', what I'm assuming will eventually be the "standard" since alot of new MSP users don't have the MSP430UIF programmer.

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@Greeg The soldermask is Dynamask 5000 dry film. I'm a real fan of it. All it take is a laminator to get it on the board and a UV source to expose. A cheap nail dryer from eBay works fine. It can even manage the text at the top of the board. I do occasionally get some bits flaking off. This Instructable got me into it. I've got a fair bit of it, so if anyone wants to try it out then drop me a PM.

 

 

As I've got a FET430-UIF (eBay bargain) and the TagConnect cables came with an adapter it makes sense for me to stick with it - for now at least. I've discovered one trace on the board shown that isn't right. I tried using the first of the diagrams on this page and can't get it to work. The second does, so I need to move my TEST/SBWTCK connection. I've got an Eagle footprint for this that'd I'd be happy to share once it's clearer.

 

Unfortunately this move makes even more of a clash with the footprint @@spirilis has done. (The VCC connection on his design is the one used to detect VCC OUT on an externally powered board rather that the VCC IN if powering the board from the FET430-UIF.)

 

It'd be great if it's not too late to change Sprilis's design so there's no clash with the TagConnect FET430-UIF one. I understand if it's not possible though.

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@Greeg The soldermask is Dynamask 5000 dry film. I'm a real fan of it. All it take is a laminator to get it on the board and a UV source to expose. A cheap nail dryer from eBay works fine. It can even manage the text at the top of the board. I do occasionally get some bits flaking off. This Instructable got me into it. I've got a fair bit of it, so if anyone wants to try it out then drop me a PM.

 

 

As I've got a FET430-UIF (eBay bargain) and the TagConnect cables came with an adapter it makes sense for me to stick with it - for now at least. I've discovered one trace on the board shown that isn't right. I tried using the first of the diagrams on this page and can't get it to work. The second does, so I need to move my TEST/SBWTCK connection. I've got an Eagle footprint for this that'd I'd be happy to share once it's clearer.

 

Unfortunately this move makes even more of a clash with the footprint @@spirilis has done. (The VCC connection on his design is the one used to detect VCC OUT on an externally powered board rather that the VCC IN if powering the board from the FET430-UIF.)

 

It'd be great if it's not too late to change Sprilis's design so there's no clash with the TagConnect FET430-UIF one. I understand if it's not possible though.

I had basically based mine on the FET430UIF adapter minus the quirk about the VCC bit.  That said, I didn't have one in hand at the time I designed that, so I was just going by the website information from tag-connect.  In any case, I have an order of eZFET adapter boards that use my design already... although the various Vcc, RX & TX lines are broken out to jumpers so they could be disconnected or fiddled around with as needed.  RST, TST and GND are the only ones direct-connected to the RJ12 on that board.  (I'll be shipping those out to @@bluehash this week along with some CAN bpaks).

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@Sprirlis - I made the same mistake as you with the TEST pin - thinking it needed to go to TEST/VPP as per the first diagram. I can only get it to work going to TCK directly. I've yet to etch a corrected board (and the pad is too small to do a green-wire fix), but I think the usage from a FET430-UIF when powering the board from the FET would be:

 

                O
 RESET/SBWTDIO . . VCC (IN)
   TEST/SBWTCK . .
           GND . .
              O   O

Apologies for the ASCII art.
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@Sprirlis - I made the same mistake as you with the TEST pin - thinking it needed to go to TEST/VPP as per the first diagram. I can only get it to work going to TCK directly. I've yet to etch a corrected board (and the pad is too small to do a green-wire fix), but I think the usage from a FET430-UIF when powering the board from the FET would be:

 

                O
 RESET/SBWTDIO . . VCC (IN)
   TEST/SBWTCK . .
           GND . .
              O   O

Apologies for the ASCII art.

 

Hmm.  Well, I'll wait for you to get the FET430 working correctly before calling my current adapter boards junk :-)

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Okay guys, I was reading through [Tipdf]slau278r[/Tipdf] (MSP-FET user guide)

 

Figure 2-2 on page 24 is what's important. if you haven't seen it already.

 

From the FET TCK is the pin that actually handles the SBWTCK signals. The TEST/VPP pin only supplies the higher voltage required for the physical JTAG fuse blow procedure.

 

The user guide states "If fuse blow functionality is not needed, R2 is not required (populate 0 ohms) and do not connect TEST/VPP to TEST/SBWTCK."

 

 

It is beyond me why they didn't install the resistor on the SPY-BI-TAG in the first place, as it clearly shows in their datasheet that the SBWTCK pin is on footprint pin 6.

 

Basically to make the SPY-BI-TAG compatible with @@spirilis's layout you need to install the unpopulated resistor.

 

<tl;dr>

@@Fred you shouldn't need to etch a corrected board, just install the 330 ohm R1 on your SPY-BI-TAG board.

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@@greeeg Unfortunately not. I installed the 330 ohm resistor but no matter what I tried I couldn't get that setup to work. I spent a day swearing at it, getting out the oscilloscope, etc.

 

I thought I had a dodgy FET (eBay bargain) until I remembered an Olimex F2013 PIR board that has a 10-pin header. It worked fine. Then I realized it uses the connections as in Figure 2.3 (on the following page). Figure 2.3 also works for the AFE252 that I was trying to use too. Also works for a G2533. I know the caption for Figure 2.3 says it's just for F5xx and F6xx but that just doesn't seem to be the case.

 

Right now I've just connected straight from the FET to an AFE252 breakout board with jumper wires. I'll etch another board with TagConnect header and double check that my ASCII art diagram above is correct.

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