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trace length vs parallelism, which is worse for USB signals?


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hey guys I am working towards my current project for the 2.0 SNES USB, and I ran into a competing set of requirements in routing my USB 2.0 tracks.

 

is it worse to break parallelism but maintain the matched track length, or keep the parallelism and accept a 50 mil difference in length?

 

here is my layout that I am working with and the two options.  this line is the USB 2.0 D+ and D- lines between the 2240i, and the 2412b

post-7036-0-47128700-1365004658_thumb.jpg

 

this is my first time having to actually closely watch how the board is laid out and the tradeoffs between requirements, cause i never used high speed signals before.

 

post-7036-0-78864700-1365004679_thumb.jpg

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If you're using full-speed USB (12 MHz), you don't have to worry much about transmission-line criteria much at all.  The quarter-wavelength of 12 MHz on PCB is over 1m.  For high speed USB (480 MHz), a quarter wave on PCB is going to be about 8cm, which is still reasonably long.  However, you do want to worry about impedance matching in your transmission lines (parallelism, as you put it).

 

Grok "RF transmission lines" and use the same board design principles for your USB-HS connection.  In a nutshell, use a 4-layer board with a ground layer directly beneath the signal layer, surround the TX lines with copper-poured ground, and dump vias all over the board to prevent ground loops -- and especially around the TX lines.

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In my experience, crack open any PC motherboard with USB front panel ports and you'll see that impedance is totally not controlled after the signals exit the pcb on a cheapie wire harness. It's bad practice but I would say that you can do either and still get by.

 

Given the choice. I would break impedance (parallelism) over length match. Reason is that unlike rf, you have a much higher power signal propagating on the tline and a little loss in s21 by means of reflection isn't going to degrade the signal to the point where the receiver cannot decode. I don't think the driver cares to much about reflected power either (within reason).

 

Un matched length diff pairs will cause emc issues (radiation) since at the differential receiver there will be a time equal to the length skew divided by the signal velocity where the signal is completely common mode (bad).

 

In the end, 50 mils won't matter. I designed a qseven module carrier board before to this guide:

 

http://www.qseven-standard.org/fileadmin/spec/Qseven-DG_10_Release_Candidate.pdf

 

See what it says about USB routing in section 4.5.

 

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This reminds me of one annoyance I've dealt with; FTDI's FT230X has the USB D- and D+ on opposite sides of how they come out on USB Mini-B SMD receptacles.  I think every design I've done involved one of the lines wrapping around with a via & trace on the underside.  Didn't seem to affect the I/O though, but I only tried at 115200bps.

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This reminds me of one annoyance I've dealt with; FTDI's FT230X has the USB D- and D+ on opposite sides of how they come out on USB Mini-B SMD receptacles.  I think every design I've done involved one of the lines wrapping around with a via & trace on the underside.  Didn't seem to affect the I/O though, but I only tried at 115200bps.

The vias add a little bit of inductance, but no big deal at 12 MHz.

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