Problem using Arduino code in Energia

[BDCoDE 0]

That was really great explanation, I'm new to electronics, not only Energia. And posts like yours helps a lot. I'm a little bit busy this days, but I will try to use your advices in practice as soon as possible. Thank you!

[semicolo 39]

My advice would be: keep it simple, if it works with floats and you don't need to optimize more, keep the floats and don't waste time.

But if you want to learn, yes floats need to be avoided on more complex projects

[roadrunner84 466]

I just got some feedback on my story about getting rid of floating-points. (I posted it on my blog)

Instead of multiplying by 4, you could also take 4 samples and add them up, this is called oversampling.

For every doubling in the number of samples, you're effectively adding one bit to the ADC resolution.

So for our 10-bit ADC:

2 samples summed up results in 11-bit resolution.

4 samples summed up results in 12-bit resolution.

8 samples summed up results in 13-bit resolution.

n samples summed up results in (10 + log₂(n))-bit resolution.

Take into account that this can only be used for slow signals and slow measurements. If your signal changes rapidly, you'd be smoothing the signal out and effectively miss information (if the change is faster than twice your sampling time). E.g.: you measure your ADC every 10ms, but the signal changes within 15ms; you'll not be able to see the real change in your values. This is not really an issue in displaying, but when you're logging values it becomes a problem (you cannot make graphs of it anymore).

For every doubling in oversampling, you're sacrificing time. If you have an ADC that can sample at 10Hz, but you want an update of your value every second, you cannot oversample more than 10 times (13.322-bit resolution), because you'd drop below the effective sampling frequency of 1Hz.

[semicolo 39]

@@roadrunner84 I think you need more samples for oversampling

add 4 samples, right shift once -> 11 bits

add 16 samples, right shift twice -> 12 bits

add 64 samples, right shift thrice -> 13 bits

...

And you need noise for it to work correctly, but it doesn't hurt to implement it.

[oPossum 1,083]

Even with proper dither (noise), the performance is limited by ADC INL, DNL, and other sources of imprecision. The theory that says the ENOB can be increased by log2(N) by oversampling N times assumes a perfect ADC and perfect dither. Neither exist in real circuits.

[roadrunner84 466]

Imperfect dither should work just as good, the inherent non-linearity of the ADC is still existing, so it doesn't solve that.

 

@semicolo: Why do I need to oversample 4 times AND shift once to get 1 extra bit? I don't get it, adding up 4 samples saves me the multiplication, and since I average over multiple samples I increase precision (in theory). I don't see how I'd need to double the oversampling and shift again to get extra bits.

[semicolo 39]

Hard to explain the real maths on a forum and it's been more than 10 years I've learned about it and never really used for real.

Adding more samples and shifting is supposed to lower the SNR too, if you just keep adding samples, the noise adds too and you don't really gain any precision.