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Implementing clock delay


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I've been tasked with building a controller for a laser we have in the lab.  I'm going to use a G2553 to generate the GPIO I need plus the clock signal required to trigger the laser pulses.

 

I want to add an external trigger input to allow the laser to be synced to an external source and it would be very beneficial to be able to include a programmable delay into the signal.

 

So I'm trying to figure out what sort of performance I can expect and the most efficient way to implement this.  Would it be better to try and catch every rising and falling edge and flip the output pin after some delay, or to measure the frequency of the input signal and use that to adjust an output PWM?  If I were to set it up as a pass through....output triggered directly from the input interrupt, how many clock cycles of latency should I expect?

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i thought about that and did a little research into it but didn't find much.  The only thing I did find was discussions about the internal PLL being very touchy about the stability of the clock source, so I was worried that the input signal might be too noisy or that changing the frequency would crash it.  I was also contemplating using a 16 MHz crystal for when the MCU is acting as the master clock.

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Use timer capture to determine exactly when the source pulse occurred and then use timer compare to recreate the pulse some exact time later. There will be a minimum delay due to ISR latency and the time it takes to setup the timer compare, probably less than 50 cycles. The max delay would be aprox 65480 cycles.

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We could provide better recommendations if you told us the frequency and expected patterns/duty cycles of the control signal, and the expected range of delays you would like.  Are we talking seconds? milliseconds? microseconds? nanoseconds?  What sort of precision and accuracy do you need?

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sure...sorry.

 

Duty cycle would always be ~50%, but the laser triggers on rising edge, so the position of the falling edge doesn't matter that much as long as the pulse length is between 2 and 10 microseconds. The fastest the laser will pulse is 4KHz.  

 

The delay is just there to correct for line latency with other synced components, so it will be less than a single period with ~microsecond granularity, but the smaller the better.  I would like precision on order 1 ~microsecond or better.

 

Is it true that that G2xxx series chips don't support HF crystal mode?  Is there a value line chip that will take an external 16Mhz (or faster) crystal?

 

Edited with updated specs

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I did some testing and at 16 MHz, I'm getting around 3 us lag with the interrupt just toggling the pin (zero delay case).  So I did some brainstorming and came up with a wild idea to float past the brains here.

 

What I want to do is take a serial-parallel shift register and use the clock line as input.  The 8 outputs of the register would be connected into an 8:1 demux with the demux output being the output clock signal.  The demux would allow me to select a delay of between 1 and 8 clock cycles from a secondary reference clock by selecting which output of the shift register I connect to the clock_out line.  

 

If I drive the register with a 16 Mhz reference clock, I get an ideal period of 62 ns...so I would introduce 62ns of jitter in the clock, but allow me to delay it by 84ns per step (62ns + 22ns tpd).  If I put 5 register/demux combos in series, that gives me 40 bits and a total delay of 3.4 microseconds, which puts me within the latency of the micro, allowing me to switch back to a software trigger to do longer delays.

 

Does this seem reasonable?  

 

 

post-28692-0-69814800-1363051695_thumb.png

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