Rei Vilo 695 Posted January 5, 2013 Share Posted January 5, 2013 Surprisingly, the MSP430G2553 seems to require an extra initial mock reading data[0] = SPI.transfer(0); before starting to read the right address.Unfortunately, I can't provide logic analyser trace as the signal on the MSP430G2553 is below the threshold of my logic analyser which doesn't feature adjustable threshold.On the LM4F and on the MSP430G2553 with the initial mock reading data[0] = SPI.transfer(0); *** startwrite >abcdefghijklmnobuffer=---------------read <abcdefghijklmno*** end On the MSP430G2553 without the initial mock reading data[0] = SPI.transfer(0); *** startwrite >abcdefghijklmnobuffer =---------------read <?abcdefghijklmn*** end The first reading returns ?.Commenting lines 72 and 73 on usci_spi.cpp as suggested by RickKimball has no impact.---For more, please refer to official issue page at https://github.com/energia/Energia/issues/164Attached minimal code with unchanged SRAM library SRAM.cpp and SRAM.h #include "Energia.h" #include "SPI.h" #include "SRAM.h" // Define variables and constants #if defined(__MSP430G2553__) SRAM mySRAM(P1_4); // chip select on pin P1_4 #elif defined(__LM4F120H5QR__) SRAM mySRAM(PE_5); // chip select on pin PE_5 #else #error Board not supported #endif const uint16_t MAX = 0x0f; char buffer[MAX]; void setup (void){ SPI.begin(); SPI.setClockDivider(SPI_CLOCK_DIV8); mySRAM.begin(); Serial.begin (9600); Serial.println(); Serial.println("*** start"); Serial.print("write >"); for (uint8_t j=0; j<MAX; j++) { buffer[j]='a' + j; Serial.print((char)buffer[j]); } Serial.println(); mySRAM.write(300, (uint8_t *) buffer, sizeof buffer); Serial.print("buffer ="); for (uint8_t j=0; j<MAX; j++) { buffer[j]='-'; Serial.print((char)buffer[j]); } Serial.println(); Serial.print("read <"); mySRAM.read(300, (uint8_t *) buffer, MAX); for (uint8_t j=0; j<MAX; j++) { Serial.print((char)buffer[j]); } Serial.println(); Serial.println("*** end"); Serial.end(); while(true); } void loop (void){ } bluehash 1 Quote Link to post Share on other sites
spirilis 1,265 Posted January 5, 2013 Share Posted January 5, 2013 I will check the errata sheets to be sure, but I know on the G2xx2 series (e.g. 2452) there is an errata where the first SPI transfer results in 1 extra clock cycle being kicked out, so the solution is to usually do a mock transfer after PUC and before any real data is transferred. I'd think the G2xx3 has fixed this but... devil's in the errata sheet... edit: Nope, all the USCI errata seem to apply to I2C and UART with the G2553. Hmmm Quote Link to post Share on other sites
Rei Vilo 695 Posted January 5, 2013 Author Share Posted January 5, 2013 Thank you for your investigation. If the issue is replicable, fixing it would require adding an extra line of code to the SPI library. Quote Link to post Share on other sites
Rickta59 589 Posted January 5, 2013 Share Posted January 5, 2013 /** * spi_send() - send a byte and recv response */ uint8_t spi_send(const uint8_t _data) { UCB0TXBUF = _data; // setting TXBUF clears the TXIFG flag while (UCB0STAT & UCBUSY) ; // wait for SPI TX/RX to finish return UCB0RXBUF; // reading clears RXIFG flag } Try that in usci_spi.cpp Rei Vilo 1 Quote Link to post Share on other sites
Rei Vilo 695 Posted January 6, 2013 Author Share Posted January 6, 2013 Thanks! It works fine and stability is met up to SPI.setClockDivider(SPI_CLOCK_DIV2); for MSP430G2553. Quote Link to post Share on other sites
Rei Vilo 695 Posted January 6, 2013 Author Share Posted January 6, 2013 See new pull request on the Energia repository awaiting validationhttps://github.com/energia/Energia/pull/168'>Issue 164 bluehash 1 Quote Link to post Share on other sites
spirilis 1,265 Posted January 6, 2013 Share Posted January 6, 2013 I don't know if this helps much, but I took my v1.5 LP with G2553 and loaded your example sketch (plus copied the SRAM.cpp / SRAM.h you linked) and compiled/ran with a new Energia install on my windows box... I don't have this SRAM chip so the MISO line throws all zeroes, but here's the output (at least you can see MOSI and CS [P1.4] in sync with SCLK): http://spirilis.net/junk/msp430/reivilo_sramtest_g2553.logicdata This was done with a Saleae Logic16, you can d/l the Saleae Logic software for free to view/examine that file: http://www.saleae.com/downloads Rickta59 1 Quote Link to post Share on other sites
Rickta59 589 Posted January 7, 2013 Share Posted January 7, 2013 @spirilis, I bet that device makes it a lot easier to debug spi stuff. Thanks for taking a snapshot! The patch above seems to have solved the issue Rei Vilo was having. -rick Quote Link to post Share on other sites
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