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Mistake on pin mapping ?


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Hi all,

 

First sorry for my english, I'm french ...

 

So, trying to play with SPI and a nRF24L01, I met a lot of issues, nothing worked. After several days I was desperate and looking at pin mapping in the datasheet of the MSP430G2553 I found a difference with the schema displayed on energia's wiki : USCI_B0 CS pin is not on pin 2.0, but on pin 1.4 !

 

Unfortunately I chose this pin in order to command the CS of my nRF, and I don't know why exactly but SPI refused to work. I changed to another pin and ooowwwww miracle it works :)

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Actually, I don't understand as  pins_energia.h shows

#if defined(__MSP430_HAS_USI__)
static const uint8_t SS   = 8;  /* P2.0 */
static const uint8_t SCK  = 7;  /* P1.5 */
static const uint8_t MOSI = 14; /* P1.6 */
static const uint8_t MISO = 15; /* P1.7 */

 

and

#if defined(__MSP430_HAS_USCI__)
static const uint8_t SS      = 8;  /* P2.0 */
static const uint8_t SCK     = 7;  /* P1.5 */
static const uint8_t MOSI    = 15; /* P1.7 */
static const uint8_t MISO    = 14; /* P1.6 */
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Yes, I wondered about the pin mapping for Launchpad 2553 (20 pin chip) and 2452 (14 pin chip).

I am busy with an SPI interface to LP2553, so I checked the datasheets since this is of interest to me ....

 

I would have thought SPI CS/SS would be P1.4 and I'm glad someone else discovered this. Thanks B@tto.

 

The data sheet assigns this STE signal to P1.4; this means physical pin 6 in both 20 & 14 pin devices.

 

This would make sense:

- consistent SPI 4 wire mode pinning in both 14 and 20 pin devices.

- consistent use of STE as a master output -or- slave input (see slau144i, 430x2xx user guide - table 16.1 on page 450)

   the above functions are defined by hardware in the chip, so likely cannot change even by software definitions.

 

So (Rei), I'm wondering too about P2.0 definitions but I really don't have the knowledge to dig further.

But according to B@tto, the SS / CS / STE signal does come from physical pin 6 or P1.4.

 

cheers to all.

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Forget about the hardware behind CS. It is up to the programmer to drive the SS low when it want's to address a certain slave and can do that with _any_ of the GPIO's and does not have to be P2.0 or P1.4 for that matter. This gives flexibility and allows you to address more than one slave on the bus. Ignore the the hardware behind it. P1.4 (STE) is not setup as SS so you are free to use that pin for anything else.

 

Hope this explains it.

 

Also see: https://github.com/energia/Energia/wiki/Hardware

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I think we understand that your are saying, but as alf1ch said, P1.4 is Slave Select if you want to use MSP as SPI Slave, and not as master.

 

Anyway, in my case : trying to communicate with nRF using P1.4 as nRF's SS ==> FAIL    I just changed to P2.0 (choose ramdomly) ==> SUCCESS

 

I chose first P1.4 just because on pin mapping it was like the others like P2.0, so why not :)

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