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CCs v 5.2: How the compiler map register to a certain address

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there must be a starting offset for your interrupt vector,
Ex. in msp430f5328.h (from mspgcc), the offset is from 0xff80, this yields the final vector address 0xfff2.


* Interrupt Vectors (offset from 0xFF80)

#define WDT_VECTOR          (0x0072) /* 0xFFF2 Watchdog Timer */


for the watchdog control register, u are looking at the "base address" 0x0150, the actual control register address 0x015c should be somewhere else in your header, for mspgcc the are within a few lines. why we need a "base address" i don't know, but many other registers has base address defined, they looks like they are always 8 bytes aligned., i guess they are used for the compiler / macro to process extended (16bit+) addressing? just don't know.


the 0x0150 is actually a CRC data i/o register (whatever that is)

#define __MSP430_HAS_WDT_A__          /* Definition to show that Module is available */
#define __MSP430_BASEADDRESS_WDT_A__ 0x0150

#define WDTCTL_               0x015C    /* Watchdog Timer Control */
sfrb(WDTCTL_H , WDTCTL_+1);
/* The bit names have been prefixed with "WDT" */
/* WDTCTL Control Bits */


hope that makes sense. the header files always use some "clever" macro magic to do things so it is not straightforward to look at it and understand how things goes.


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