bluehash 1,581 Posted March 22, 2013 Share Posted March 22, 2013 Good stuff! Quote Link to post Share on other sites
jazz 209 Posted March 25, 2013 Author Share Posted March 25, 2013 BTW, I noticed something weird (or maybe it's not) about "mov.w R5, const(R6)" instruction. For some delays inside the code, for timing alignment, I used NOPs. To don't have wasted code, I inserted real code (only "mov.w R5, const(R6)" instructions) instead NOPs for delay space. If the right number of NOP's is used, result for each cycle is not shifted: 0, 0, 0... If there is one NOP less, result is shifted with each cycle: 0, -1, -2, -3... If there is one NOP more, result is shifted with each cycle: 0, 1, 2, 3... When NOPs are replaced with "mov.w R5, const(R6)", result is randomly floating: 0, -1, -1, 0, -1, 0, 1, 0, 0, 1, 0, -1... Instruction takes 2 words, but it seems that number of cycles for instruction is not constant. Problem is related to USB RAM, and explained on another topic: http://forum.43oh.com/topic/2926-msp430-usb-2-kb-ram-1c00-23ff/?p=31968 Quote Link to post Share on other sites
jazz 209 Posted March 27, 2013 Author Share Posted March 27, 2013 Reading (verify) speed is increased close to 200 KB/s per target, or 800 KB/s total, and it is around CDC limitation (http://forum.43oh.com/topic/2775-msp430-usb-benchmark/?p=23696). Writing speed (for MSP430F5xx) in increased, and it is close to 145 KB/s. Due to slower speed of USB RAM, 64 bytes (vars) are stored in main RAM area (2400-33FF), and main USB buffer size is decreased to 4032 bytes. Will be decreased more, later.Example of flashing 192 KB in 2.6 seconds: D:\msp430>flash -f sbw_test_192.txt -e -w -v File "sbw_test_192.txt" 196608 bytes Get Device Device: 1 JTID: 91 Fuse: OK 1A04: 54 35 1A06: 10 10 Device: 2 JTID: 91 Fuse: OK 1A04: 54 35 1A06: 10 10 Erase Write Address: 05C00 Words: 2014 Address: 06BBC Words: 2014 Address: 07B78 Words: 2014 Address: 08B34 Words: 2014 Address: 09AF0 Words: 2014 Address: 0AAAC Words: 2014 Address: 0BA68 Words: 2014 Address: 0CA24 Words: 2014 Address: 0D9E0 Words: 2014 Address: 0E99C Words: 2014 Address: 0F958 Words: 2014 Address: 10914 Words: 2014 Address: 118D0 Words: 2014 Address: 1288C Words: 2014 Address: 13848 Words: 2014 Address: 14804 Words: 2014 Address: 157C0 Words: 2014 Address: 1677C Words: 2014 Address: 17738 Words: 2014 Address: 186F4 Words: 2014 Address: 196B0 Words: 2014 Address: 1A66C Words: 2014 Address: 1B628 Words: 2014 Address: 1C5E4 Words: 2014 Address: 1D5A0 Words: 2014 Address: 1E55C Words: 2014 Address: 1F518 Words: 2014 Address: 204D4 Words: 2014 Address: 21490 Words: 2014 Address: 2244C Words: 2014 Address: 23408 Words: 2014 Address: 243C4 Words: 2014 Address: 25380 Words: 2014 Address: 2633C Words: 2014 Address: 272F8 Words: 2014 Address: 282B4 Words: 2014 Address: 29270 Words: 2014 Address: 2A22C Words: 2014 Address: 2B1E8 Words: 2014 Address: 2C1A4 Words: 2014 Address: 2D160 Words: 2014 Address: 2E11C Words: 2014 Address: 2F0D8 Words: 2014 Address: 30094 Words: 2014 Address: 31050 Words: 2014 Address: 3200C Words: 2014 Address: 32FC8 Words: 2014 Address: 33F84 Words: 2014 Address: 34F40 Words: 1632 Size: 196608 bytes Time: 1328 ms Speed: 144,58 KB/s Verify Address: 05C00 Words: 98304 Size: 196608 bytes Time: 969 ms Speed: 198,14 KB/s Release Device Total Time: 2594 ms Quote Link to post Share on other sites
jazz 209 Posted April 3, 2013 Author Share Posted April 3, 2013 Not constant number of instruction cycles on MSP430F5xx is not only related to USB RAM. It is related to all RAM. It seems that is not possible to read/change/write RAM in 3 cycles. It is not related to MCLK, because problem is present on 8 MHz or 24 MHz. rra.b @R5 ; 3 rra.b @R5 ; 3 nop ; 1 rra.b @R5 ; 3 rra.b @R5 ; 3 rra.b @R5 ; 3 nop ; 1 rra.b @R5 ; 3 rra.b @R5 ; 3 rra.b @R5 ; 3 nop ; 1 rra.b @R5 ; 3 rra.b @R5 ; 3 nop ; 1 nop ; 1 nop ; 1 rra.b @R5 ; 3 nop ; 1 nop ; 1 nop ; 1 rra.b @R5 ; 3 nop ; 1 nop ; 1 nop ; 1 ------------------------- ------------------------- Total number of cycles 24 Total number of cycles 27 Funny thing is that problem is present only on MSP430F5xx, and not on MSP430F2xx that will spend same number of cycles (24) with any rra/nop order. roadrunner84 1 Quote Link to post Share on other sites
oPossum 1,083 Posted April 3, 2013 Share Posted April 3, 2013 This is due to the way the CPUX and CPUX2 are piplelined. The FRAM parts are even worse due to the cache. jazz 1 Quote Link to post Share on other sites
roadrunner84 466 Posted April 3, 2013 Share Posted April 3, 2013 Intruiging! I think it's not the read/alter/write, but the read of a memory location in the beginning of the instruction after the writing. I think the result of the alter must be known before the next read can be done, which doesn't happen in time with two (or maybe only three) successive operations on the same memory location. jazz 1 Quote Link to post Share on other sites
oPossum 1,083 Posted April 3, 2013 Share Posted April 3, 2013 Right, basically a memory read by the current instruction will cause a pipleline stall if a memory write from the previous instruction has not yet completed. Even the basic MSP430 CPU has a simple pipeline. The CPUX and X2 just tweaked it a bit. Quote Link to post Share on other sites
roadrunner84 466 Posted April 3, 2013 Share Posted April 3, 2013 Does it stall until the previous instruction is done writing or when it's done evaluating? It's not much of a problem to feed the result back to the input of the ALU in case of a memory stall (which needs to be detected anyways). Quote Link to post Share on other sites
jazz 209 Posted April 3, 2013 Author Share Posted April 3, 2013 Problem is not related to read/change/write same memory location, because using different memory locations (stored in R5, R6, R7...) will give same results. It is probably related to some kind of memory delay. Well, sometimes, for weird things solution is in lucky factor. I almost gave up, because didn't find some logic ratio between number of instructions with number of cycles. Just remove all NOPs from code, and bingo. It seems that weird thing fits perfect, somehow close to 1 extra cycle between 2 RRAs (fetched at once due to "pipeline"). It is working like a charm. Quote Link to post Share on other sites
jazz 209 Posted April 9, 2013 Author Share Posted April 9, 2013 I made first test with MSP430G2xx value line, and it is working OK. Multiprogramming with mixed MSP430G2xx and MSP430F2xx devices on SBW+ bus is also working, because flashing parameters (specified by datasheet) are the same. Here is example for flashing 2 x MSP430G2553 and 2 x MSP430F2272. D:\msp430>flash -f sbw_test_16.hex -e -w -v File "sbw_test_16.hex" 16384 bytes Get Device Device: 0 JTID: 89 Fuse: OK 0FF0: 25 53 0FFD: 01 00 Device: 1 JTID: 89 Fuse: OK 0FF0: F2 27 0FFD: 01 04 Device: 2 JTID: 89 Fuse: OK 0FF0: 25 53 0FFD: 01 00 Device: 3 JTID: 89 Fuse: OK 0FF0: F2 27 0FFD: 01 04 Erase Write Address: 0C000 Words: 2014 Address: 0CFBC Words: 2014 Address: 0DF78 Words: 2014 Address: 0EF34 Words: 2014 Address: 0FEF0 Words: 136 Size: 16384 bytes Time: 359 ms Speed: 44,57 KB/s Verify Address: 0C000 Words: 8192 Size: 16384 bytes Time: 78 ms Speed: 205,13 KB/s Release Device Total Time: 547 ms D:\msp430> bluehash 1 Quote Link to post Share on other sites
bluehash 1,581 Posted April 9, 2013 Share Posted April 9, 2013 Sweet! Do you have a 2955? Quote Link to post Share on other sites
jazz 209 Posted April 11, 2013 Author Share Posted April 11, 2013 No, I don't have MSP430G2955. Don't have free time now, but plan is to try MSP430G2955 and MSP430F5172 soon. Quote Link to post Share on other sites
jazz 209 Posted April 12, 2013 Author Share Posted April 12, 2013 John Taylor made SBW decoder, and publish some logs for MSPFET. Very useful for anybody who is working on SBW related stuff. http://e2e.ti.com/support/microcontrollers/msp430/f/166/t/257845.aspx Quote Link to post Share on other sites
jazz 209 Posted April 23, 2013 Author Share Posted April 23, 2013 Example of flashing MSP430G2955 with 32 KB file, together with 2 MSP430F2272 on SBW+ bus: D:\msp430>flash -f sbw_test_32.hex -e -w -v File "sbw_test_32.hex" 32768 bytes Get Device Device: 0 JTID: 89 Fuse: OK 0FF0: F2 27 0FFD: 01 04 Device: 1 JTID: 89 Fuse: OK 0FF0: 29 55 0FFD: 01 00 Device: 2 JTID: 89 Fuse: OK 0FF0: F2 27 0FFD: 01 04 Erase Write Address: 08000 Words: 2014 Address: 08FBC Words: 2014 Address: 09F78 Words: 2014 Address: 0AF34 Words: 2014 Address: 0BEF0 Words: 2014 Address: 0CEAC Words: 2014 Address: 0DE68 Words: 2014 Address: 0EE24 Words: 2014 Address: 0FDE0 Words: 272 Size: 32768 bytes Time: 703 ms Speed: 45,52 KB/s Verify Address: 08000 Words: 16384 Size: 32768 bytes Time: 156 ms Speed: 205,13 KB/s Release Device Total Time: 1031 ms D:\msp430> Example of flashing MSP430G2955 with 55.75 KB (2100 - FFFF) file: D:\msp430>flash -f sbw_test_56.hex -e -w -v File "sbw_test_56.hex" 57088 bytes Get Device Device: 1 JTID: 89 Fuse: OK 0FF0: 29 55 0FFD: 01 00 Erase Write Address: 02100 Words: 2014 Address: 030BC Words: 2014 Address: 04078 Words: 2014 Address: 05034 Words: 2014 Address: 05FF0 Words: 2014 Address: 06FAC Words: 2014 Address: 07F68 Words: 2014 Address: 08F24 Words: 2014 Address: 09EE0 Words: 2014 Address: 0AE9C Words: 2014 Address: 0BE58 Words: 2014 Address: 0CE14 Words: 2014 Address: 0DDD0 Words: 2014 Address: 0ED8C Words: 2014 Address: 0FD48 Words: 348 Size: 57088 bytes Time: 1219 ms Speed: 45,73 KB/s Verify Address: 02100 Words: 28544 Size: 57088 bytes Time: 281 ms Speed: 198,40 KB/s Release Device Total Time: 1703 ms D:\msp430> Quote Link to post Share on other sites
bluehash 1,581 Posted April 23, 2013 Share Posted April 23, 2013 No, I don't have MSP430G2955. Don't have free time now, but plan is to try MSP430G2955 and MSP430F5172 soon. Did you get one? I have Rob's MSP430G2955 board which I can send. I have a spare 2955, if you want. Quote Link to post Share on other sites
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