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SBW MSP430F550x based programmer


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This topic was some kind of progress report. I had long holidays between June and October, without topic related activity. I have list of functions that must be supported by flasher. There are two poi

Complete CDC transfer between PC and programmer can be logged by enabling {$DEFINE CDCLOG} in flash.pas   Short manual manual.pdf

Now it is able to erase/flash/verify target devices. Flashing is based on word programming. Still have some problems with higher-speed block programing. Flashing is done with 32 KB pattern file (with

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So what is this SBW+? Do you load a tiny bootloader in the RAM of the target, which in place reads the firmware over a serial line on P1.0?

 

First idea was to use P1.0 line just for indication for flash operations, to avoid "blind" SBW/JTAG flashing. Later, I find out that it can be done much more with P1.0 line. It is visible on read transfer rate, and I expect also high write/flash transfer rate. Programmer (MSP430F55x) is connected to PC over USB (CDC), so there is no transfer limitation for MSP430F55x/PC data exchange.

 

Target RAM is used, but it is more complicated than standard UART. Programmer is clocking (executing program on) target devices, and exchanging data at the same time. Algorithm is not related to any MSP430 peripheral so it will work with any SBW target device.

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After optimization, SBW+ read function speed is increased. It will be used for verify target flash (instead SBW PSA). Verify will be done in 0.1 second for 16 KB target flash.

 

Flash Fast Read (SBW+)
1 uC   Size: 65536 bytes Time: 391 ms Speed: 163,7 KB/s
Total  Size: 262144 bytes Time: 391 ms Speed: 654,7 KB/s

 

BTW, I noticed something weird (or maybe it's not) about "mov.w R5, const(R6)" instruction.

For some delays inside the code, for timing alignment, I used NOPs. To don't have wasted code, I inserted real code (only "mov.w R5, const(R6)" instructions) instead NOPs for delay space.
 
If the right number of NOP's is used, result for each cycle is not shifted: 0, 0, 0...
If there is one NOP less, result is shifted with each cycle: 0, -1, -2, -3...
If there is one NOP more, result is shifted with each cycle: 0, 1, 2, 3...

When NOPs are replaced with "mov.w R5, const(R6)", result is randomly floating: 0, -1, -1, 0, -1, 0, 1, 0, 0, 1, 0, -1...
Instruction takes 2 words, but it seems that number of cycles for instruction is not constant.

Maybe author of web page is someone from 430oh, or maybe someone already pointed to it. Anyway, good explanation of MSP430 instruction cycles is here: http://unbarquero.blogspot.com/2011/05/msp430-cycles-and-instructions.html

 

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One more time, about theoretical maximum flashing speed for MSP430F2xx. Maximum flashing clock (f ftg) is 476 kHz.

Word programming time (t word) is 30 clocks. Maximum flashing speed (1 KB = 512 words) will be 476000 / (30 * 512) = 31 KB/s.

For block programming (32 words at once), first word request (t block0) 25 clocks, any other word (t block1-32) 18 clocks, and sequence end (t block end) 6 clocks. Maximum block flashing speed (1 KB = 512 words) will be 476000 / (25 + 511 * 18 + 16 * 6) = 51 KB/s.

With 8 MHz SCLK and using divider ( FCTL2 FN=16) 17, flashing clock is close to maximum value, 8000000 / 17 = 470588 Hz.
 

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Now it is able to erase/flash/verify target devices. Flashing is based on word programming. Still have some problems with higher-speed block programing. Flashing is done with 32 KB pattern file (with P1.0 blink example on memory end). Two MSP430F2272 devices are present on SBW+ bus.
 

File "sbw_test.hex"
32768 bytes

Get Device
Device: 0  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04
Device: 1  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04

Mass Erase

Write
Adr: 8000 Len: 4090 bytes
Adr: 8FFA Len: 4090 bytes
Adr: 9FF4 Len: 4090 bytes
Adr: AFEE Len: 4090 bytes
Adr: BFE8 Len: 4090 bytes
Adr: CFE2 Len: 4090 bytes
Adr: DFDC Len: 4090 bytes
Adr: EFD6 Len: 4090 bytes
Adr: FFD0 Len: 48 bytes
Size: 32768 bytes Time: 1109 ms Speed: 28,85 KB/s

Verify

Release Device

 

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Are you flashing two devices in parallel? Can I do this trick also with the launchpad emulator part? Then what's the big advantage of gang programmers?

 

It is able to program 4 devices on SBW+ bus at once. I was playing at the beginning with more target devices (12, because there is no limitation regarding algorithm), but 4 are perfectly fit to MSP430F550x pin package, and it will stay like this. There is no tricks regarding connection, because programming firmware must support more devices. Launchpad is not build with this purpose and it can only deal with one device on SBW bus.

 

Gang programmers are used when big number of devices must be produced/programmed (instead of using ROM). If the max programming rate per chip is low, than overall process speed can be increased. For example, if flashing size is 16 KB, and total flashing speed is 1 KB/s, for 8 devices programmed together at once, it will take 16 second, not 128. Of course, same time will be needed for connecting/disconnecting target boards to programmer, not related to gang/single way.

 

Now, flashing rate is close to 29 KB/s per device (for 4 devices, close to 116 KB/s), and this is specified as max flashing speed for Elprotronic products (http://www.elprotronic.com/files/IsNotToFast.html). Here is some note about Olimex and TI USB FET speed (https://www.olimex.com/Products/MSP430/JTAG/MSP430-JTAG-TINY-V2/).

 

Here is attached my 32 KB testing file (just replace #include statement for your target device), if somebody want to check speed for other flashing tools.

 

sbw_test.rar

 

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SBW+ block programming is working now, as expected with higher speed than word programming. In last few months, I was searching on web for fastest MSP430 flashing tools, and AFAIK (and I hope that I am wrong) no body come close to rate that I have now. Elprotronic/TI MSP Gang benchmark results for MSP430F2xx and MSP430F5xx are documented in slau358 on pages 46/47.
 

File "sbw_test.hex"
32768 bytes

Get Device
Device: 0  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04
Device: 1  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04

Erase

Block Write
Adr: 08000 Words: 2046
Adr: 08FFC Words: 2046
Adr: 09FF8 Words: 2046
Adr: 0AFF4 Words: 2046
Adr: 0BFF0 Words: 2046
Adr: 0CFEC Words: 2046
Adr: 0DFE8 Words: 2046
Adr: 0EFE4 Words: 2046
Adr: 0FFE0 Words: 16
Size: 32768 bytes Time: 703 ms Speed: 45,52 KB/s

Quick Verify
Adr: 8000 Words: 16384
Size: 32768 bytes Time: 703 ms Speed: 45,52 KB/s

Release Device
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Why do you write 2046 bytes at once, not 2048? Is this the internal size of the blocks? Now you need another write to write the vector table.

 

My USB stack is based on 4 KB (2048 words) buffer, so maximum command length that is going (at once) form PC to MSP430F550x is limited to 2048 words. For block write command, 2 words are used for command description, and rest (2046 words) for data. This is the reason why flashing of 32 KB is done by 9 write block commands.

 

Benchmark file ("sbw_test.s43") is continued 32 KB space, without vector table. It is attached before last post.

 

How come writing and reading is at the same speed? Is writing to flash so much faster than the transfer?

 

In last post for verify is used standard DATA_QUICK SBW operation, not SBW+, and because of this rate is low.

Flash Quick Read (SBW)
1 uC  Size: 65536 bytes Time: 1391 ms Speed: 46,0 KB/s
Total Size: 262144 bytes Time: 1391 ms Speed: 184,0 KB/s

Flash Fast Read (SBW+)
1 uC   Size: 65536 bytes Time: 391 ms Speed: 163,7 KB/s
Total  Size: 262144 bytes Time: 391 ms Speed: 654,7 KB/s
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Example of flashing 32 KB with 2 devices (MSP430F2272) on SBW+ bus. Total (PC flash application) execution time is 1.1 second.

File "sbw_test_32.hex"
32768 bytes

Get Device
Device: 1  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04
Device: 3  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04

Erase

Write
Address: 08000 Words: 2046
Address: 08FFC Words: 2046
Address: 09FF8 Words: 2046
Address: 0AFF4 Words: 2046
Address: 0BFF0 Words: 2046
Address: 0CFEC Words: 2046
Address: 0DFE8 Words: 2046
Address: 0EFE4 Words: 2046
Address: 0FFE0 Words: 16
Size: 32768 bytes  Time: 703 ms  Speed: 45,52 KB/s

Verify
Address: 08000 Words: 16384
Size: 32768 bytes  Time: 203 ms  Speed: 157,64 KB/s

Release Device

Total Time: 1078 ms

 

Example of flashing 2 KB with full SBW+ bus (2 x MSP430F2012, 2 x MSP430F2272).

File "sbw_test_2.hex"
2048 bytes

Get Device
Device: 0  JTID: 89  Fuse: OK  0FF0: F2 01  0FFD: 01 02
Device: 1  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04
Device: 2  JTID: 89  Fuse: OK  0FF0: F2 01  0FFD: 01 02
Device: 3  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04

Erase

Write
Address: 0F800 Words: 1024
Size: 2048 bytes  Time: 63 ms  Speed: 31,75 KB/s

Verify
Address: 0F800 Words: 1024
Size: 2048 bytes  Time: 15 ms  Speed: 133,33 KB/s

Release Device

Total Time: 140 ms
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During MSP430F5xx flash operation there is no need for external SBW/JTAG target clocking. Block write operation is more powerful than MSP430F2xx. Block size is limited to 128 bytes, and it is able to write 4 bytes at once. Flash specification In datasheet is based on us (time), not on number of clock cycles like with MSP430F2xx, and based on datasheet values, MSP430F5xx flash operations are faster than MSP430F2xx.

Theoretical max flashing speed using block write is between 78 and 103 KB/s.

1 KB ~ 1024 / 128 = 8 blocks

Min Rate  8 * 65 + (1024 / 4 - 16) * 49 + 8 * 73 = 12864 us ~ 1 KB / 12864 us = 77.74 KB/s
Max Rate  8 * 49 + (1024 / 4 - 16) * 37 + 8 * 55 = 9712 us ~ 1 KB / 9712 us = 102.97 KB/s

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First example for flashing MSP430F5xx with MSP430F5435 on SBW+ bus:

File "sbw_test_32.hex"
32768 bytes

Get Device
Device: 1  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10

Erase

Write
Address: 08000 Words: 2046
Address: 08FFC Words: 2046
Address: 09FF8 Words: 2046
Address: 0AFF4 Words: 2046
Address: 0BFF0 Words: 2046
Address: 0CFEC Words: 2046
Address: 0DFE8 Words: 2046
Address: 0EFE4 Words: 2046
Address: 0FFE0 Words: 16
Size: 32768 bytes  Time: 422 ms  Speed: 75,83 KB/s

Verify
Address: 08000 Words: 16384
Size: 32768 bytes  Time: 203 ms  Speed: 157,64 KB/s

Release Device

Total Time: 813 ms
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There is no detailed description for MSP430F5xx flash memory module, so this is just AFAIK/maybe story. On first look, it is more advanced and faster than MSP430F2xx. But there was also better way of implementation, with choice for using internal clock module or clocking it by (precise) MCLK like on MSP430F2xx. Minimum and maximum flashing (timing) values from MSP430F5xx datasheet are due internal clock module tolerance, and not related to flash memory speed itself. As a result, two same MSP430F5xx chips, with same batch code, will not flash at the 100% same speed. This can be also far from maximum possible flashing speed because of clock tolerance.

Will see if it is possible to find elegant way of flashing more than 1 MSP430F5xx present on SBW+ bus. Anyway, here is example of flashing 128 KB,  going outside of 64 K (0000 - FFFF) area with MSP430X.
 

File "sbw_test_128.txt"
131072 bytes

Get Device
Device: 0  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10

Erase

Write
Address: 08000 Words: 2046
Address: 08FFC Words: 2046
Address: 09FF8 Words: 2046
Address: 0AFF4 Words: 2046
Address: 0BFF0 Words: 2046
Address: 0CFEC Words: 2046
Address: 0DFE8 Words: 2046
Address: 0EFE4 Words: 2046
Address: 0FFE0 Words: 2046
Address: 10FDC Words: 2046
Address: 11FD8 Words: 2046
Address: 12FD4 Words: 2046
Address: 13FD0 Words: 2046
Address: 14FCC Words: 2046
Address: 15FC8 Words: 2046
Address: 16FC4 Words: 2046
Address: 17FC0 Words: 2046
Address: 18FBC Words: 2046
Address: 19FB8 Words: 2046
Address: 1AFB4 Words: 2046
Address: 1BFB0 Words: 2046
Address: 1CFAC Words: 2046
Address: 1DFA8 Words: 2046
Address: 1EFA4 Words: 2046
Address: 1FFA0 Words: 2046
Address: 20F9C Words: 2046
Address: 21F98 Words: 2046
Address: 22F94 Words: 2046
Address: 23F90 Words: 2046
Address: 24F8C Words: 2046
Address: 25F88 Words: 2046
Address: 26F84 Words: 2046
Address: 27F80 Words: 64
Size: 131072 bytes  Time: 1625 ms  Speed: 78,77 KB/s

Verify
Address: 08000 Words: 65536
Size: 131072 bytes  Time: 797 ms  Speed: 160,60 KB/s

Release Device

Total Time: 2640 ms
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Flashing with 3 devices present on SBW+ bus, 2 x MSP430F5435 and MSP430F5510:

File "sbw_test_32.hex"
32768 bytes

Get Device
Device: 0  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10
Device: 1  JTID: 91  Fuse: OK  1A04: 31 80  1A06: 12 12
Device: 2  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10

Erase

Write
Address: 08000 Words: 2046
Address: 08FFC Words: 2046
Address: 09FF8 Words: 2046
Address: 0AFF4 Words: 2046
Address: 0BFF0 Words: 2046
Address: 0CFEC Words: 2046
Address: 0DFE8 Words: 2046
Address: 0EFE4 Words: 2046
Address: 0FFE0 Words: 16
Size: 32768 bytes  Time: 312 ms  Speed: 102,56 KB/s

Verify
Address: 08000 Words: 16384
Size: 32768 bytes  Time: 203 ms  Speed: 157,64 KB/s

Release Device

Total Time: 719 ms

 

Flashing 128 KB in 2 seconds:

File "sbw_test_128.txt"
131072 bytes

Get Device
Device: 0  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10
Device: 2  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10

Erase

Write
Address: 08000 Words: 2046
Address: 08FFC Words: 2046
Address: 09FF8 Words: 2046
Address: 0AFF4 Words: 2046
Address: 0BFF0 Words: 2046
Address: 0CFEC Words: 2046
Address: 0DFE8 Words: 2046
Address: 0EFE4 Words: 2046
Address: 0FFE0 Words: 2046
Address: 10FDC Words: 2046
Address: 11FD8 Words: 2046
Address: 12FD4 Words: 2046
Address: 13FD0 Words: 2046
Address: 14FCC Words: 2046
Address: 15FC8 Words: 2046
Address: 16FC4 Words: 2046
Address: 17FC0 Words: 2046
Address: 18FBC Words: 2046
Address: 19FB8 Words: 2046
Address: 1AFB4 Words: 2046
Address: 1BFB0 Words: 2046
Address: 1CFAC Words: 2046
Address: 1DFA8 Words: 2046
Address: 1EFA4 Words: 2046
Address: 1FFA0 Words: 2046
Address: 20F9C Words: 2046
Address: 21F98 Words: 2046
Address: 22F94 Words: 2046
Address: 23F90 Words: 2046
Address: 24F8C Words: 2046
Address: 25F88 Words: 2046
Address: 26F84 Words: 2046
Address: 27F80 Words: 64
Size: 131072 bytes  Time: 1000 ms  Speed: 128,00 KB/s

Verify
Address: 08000 Words: 65536
Size: 131072 bytes  Time: 781 ms  Speed: 163,89 KB/s

Release Device

Total Time: 1938 ms
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