Jump to content
jazz

SBW MSP430F550x based programmer

Recommended Posts

Bridge code was in separated project (http://forum.43oh.com/topic/3350-msp430f550x-based-usb-uart-bridge/). During last week I was working on programmer/bridge code integration. Also, made some updates on my USB stack, and now it is able to use complete 6 KB RAM area. Flashing can't be interrupted, so programmer/bridge can't be used together in same moment. Because of this they can use same memory area. USB buffer is increased, and now it is able to receive from PC 5.75 KB at once. As a result of bigger buffer, less write splinting is needed, and flashing speed is (little) higher. For MSP430F5xx it is now around 150 KB/s.

D:\msp430>flash -f sbw_test_192.txt -e -w -v

File "sbw_test_192.txt"
196608 bytes

Get Device
Device: 1  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10
Device: 2  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10

Erase

Write
Address: 05C00  Words: 2942
Address: 072FC  Words: 2942
Address: 089F8  Words: 2942
Address: 0A0F4  Words: 2942
Address: 0B7F0  Words: 2942
Address: 0CEEC  Words: 2942
Address: 0E5E8  Words: 2942
Address: 0FCE4  Words: 2942
Address: 113E0  Words: 2942
Address: 12ADC  Words: 2942
Address: 141D8  Words: 2942
Address: 158D4  Words: 2942
Address: 16FD0  Words: 2942
Address: 186CC  Words: 2942
Address: 19DC8  Words: 2942
Address: 1B4C4  Words: 2942
Address: 1CBC0  Words: 2942
Address: 1E2BC  Words: 2942
Address: 1F9B8  Words: 2942
Address: 210B4  Words: 2942
Address: 227B0  Words: 2942
Address: 23EAC  Words: 2942
Address: 255A8  Words: 2942
Address: 26CA4  Words: 2942
Address: 283A0  Words: 2942
Address: 29A9C  Words: 2942
Address: 2B198  Words: 2942
Address: 2C894  Words: 2942
Address: 2DF90  Words: 2942
Address: 2F68C  Words: 2942
Address: 30D88  Words: 2942
Address: 32484  Words: 2942
Address: 33B80  Words: 2942
Address: 3527C  Words: 1218
Size: 196608 bytes  Time: 1266 ms  Speed: 151,66 KB/s

Verify
Address: 05C00  Words: 98304
Size: 196608 bytes  Time: 1015 ms  Speed: 189,16 KB/s

Release Device

Total Time: 2562 ms

D:\msp430>

Share this post


Link to post
Share on other sites

Due some doubts in the neighborhood (http://e2e.ti.com/support/microcontrollers/msp430/f/166/t/263398.aspx) about 150 KB/s writing rate for MSP430F5xx target devices, I add marginal read option for checking flash. First CRC value is calculated on file by PC side, and MR0/MR1 are CRC results from marginal read on target device.

D:\msp430>flash -f sbw_test_192.txt -e -w -mr

File "sbw_test_192.txt"
196608 bytes

Get Device
Device: 1  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10
Device: 2  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10

Erase

Write
Address: 05C00  Words: 2942
Address: 072FC  Words: 2942
...
Address: 33B80  Words: 2942
Address: 3527C  Words: 1218
Size: 196608 bytes  Time: 1265 ms  Speed: 151,78 KB/s

Marginal Read
Address: 05C00  Words: 98304
File: C5CD  Device: 1  MR0: C5CD  MR1: C5CD
File: C5CD  Device: 2  MR0: C5CD  MR1: C5CD
Size: 196608 bytes  Time: 2766 ms  Speed: 69,41 KB/s

Release Device

Total Time: 4281 ms

D:\msp430

Share this post


Link to post
Share on other sites

It's not finished. Now I am working on MSP430FR5xx support. After this I need to made BSL like (or not BSL related) firmware updater for programmer itself. Bridge is also not finished (have some problems on rates over 3 Mbps). Anyway, hope that this year will appear in 43oh store.

Programmer board will be very small (bus powered). It will not be able to use DIY board for programmer, because only pre-flashed MSP430 chip will be able for firmware updates. It will not need any glue/chain tools for work and it will not be compatible with any existing programmers. For programming on PC side will be used free pascal (open source) code, that will be able to compile and run on any OS (with replacing instructions for data exchange over UART/CDC). Interface will be completely open, and (if somebody give me good reason for this) I am able to add new things/possibilities.

It is not debugger, and it will work only with target devices that have SBW.

Share this post


Link to post
Share on other sites

Programmer is now able to flash FRAM devices. I was expecting much higher writing rate, but due to strange behavior (not constant number of cycles during executing code in RAM that writes to FRAM) if target device is clocked over 4 MHz, it is not possible. With 8 MHz (standard SBW+ clock) flashing was failing (randomly), and didn't found any other solution, except to go down with clock. Of course, double slower clock as result have double slower writing rate. On other side, during FRAM reading (verify command) at 8 MHz, there is no any problems. 

 

Flashing MSP430FR5739...

D:\msp430>flash -f sbw_test_15.txt -w -v

File "sbw_test_15.txt"
15736 bytes

Get Device
Device: 2  JTID: 91  Fuse: OK  1A04: 03 81  1A06: 24 24

Write
Address: 0C200  Words: 2942
Address: 0D8FC  Words: 2942
Address: 0EFF8  Words: 1983
Address: 0FFFE  Words: 1
Size: 15736 bytes  Time: 172 ms  Speed: 89,34 KB/s

Verify
Address: 0C200  Words: 7867
Address: 0FFFE  Words: 1
Size: 15736 bytes  Time: 78 ms  Speed: 197,02 KB/s

Release Device

Total Time: 312 ms

D:\msp430>

Share this post


Link to post
Share on other sites

At the beginning I was playing with more than 4 target devices, and for flashing standard SBW was used. Later, I switched to SBW+ and due to increased number of interface pins, decrease number of target devices to 4. Also, there was USB-UART bridge with hardware UART (UCA).

 

Now, I decide (and found the way how) to increase number of target devices to 8 (same as TI/Elprotronic gang programmer). There is no possibility any more to have USB-UART bridge with UCA (because UCATX/UCARX pins are used for SBW+ interface). It will be used software UART for bridge, still useful but with lower transfer rates. Verify/read operation is slower due to reading data from 8 target devices, and it is about 100 KB/s (CDC limitation 8 * 100 = 800 KB/s). Everything else is the same, and writing rate is not changed.

D:\msp430>flash -f sbw_test_16.txt -e -w -v

File "sbw_test_16.txt"
16384 bytes

Get Device
Device: 0  JTID: 89  Fuse: OK  0FF0: 29 55  0FFD: 01 00
Device: 1  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04
Device: 3  JTID: 89  Fuse: OK  0FF0: 25 53  0FFD: 01 00
Device: 4  JTID: 89  Fuse: OK  0FF0: 25 53  0FFD: 01 00
Device: 6  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04
Device: 7  JTID: 89  Fuse: OK  0FF0: 29 55  0FFD: 01 00

Erase

Write
Address: 0C000  Words: 2846
Address: 0D63C  Words: 2846
Address: 0EC78  Words: 2500
Size: 16384 bytes  Time: 359 ms  Speed: 44,57 KB/s

Verify
Address: 0C000  Words: 8192
Size: 16384 bytes  Time: 157 ms  Speed: 101,91 KB/s

Release Device

Total Time: 594 ms

D:\msp430>

Share this post


Link to post
Share on other sites

As noted before, MSP430F5xx flash controller is clocked by internal clock (MODOSC), and due the tolerance of this clock, flashing time will be different for different devices. To have better tuning possibilities, I add one more option for tolerance testing. And it also will be helpful if somebody sometimes will have some problems with SBW+ flashing (maybe chip is too slow or MODOSC is out of my tolerance).

Here is example for testing standard block write operation on full SBW+ buss...

D:\msp430>flash -com 40 -t

Get Device
Device: 0  JTID: 91  Fuse: OK  1A04: 31 80  1A06: 12 12
Device: 1  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10
Device: 2  JTID: 91  Fuse: OK  1A04: 31 80  1A06: 12 12
Device: 3  JTID: 91  Fuse: OK  1A04: 30 80  1A06: 30 10
Device: 4  JTID: 91  Fuse: OK  1A04: 31 80  1A06: 12 12
Device: 5  JTID: 91  Fuse: OK  1A04: 31 80  1A06: 12 12
Device: 6  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10
Device: 7  JTID: 91  Fuse: OK  1A04: 31 80  1A06: 12 12

Flash Test
Freq: 6000 kHz  Block: 128 bytes
Device: 0  Clk: 27390 361 239 96 101  Time: 4565 60 39 16 16  Speed: 95,08 KB/s
Device: 1  Clk: 27442 361 239 93 103  Time: 4573 60 39 15 17  Speed: 95,05 KB/s
Device: 2  Clk: 26955 361 238 96 101  Time: 4492 60 39 16 16  Speed: 95,37 KB/s
Device: 3  Clk: 23187 352 233 91  96  Time: 3864 58 38 15 16  Speed: 97,82 KB/s
Device: 4  Clk: 28495 362 241 93 101  Time: 4749 60 40 15 16  Speed: 94,37 KB/s
Device: 5  Clk: 28210 361 241 91  99  Time: 4701 60 40 15 16  Speed: 94,60 KB/s
Device: 6  Clk: 30790 366 245 96  99  Time: 5131 61 40 16 16  Speed: 92,90 KB/s
Device: 7  Clk: 28814 361 242 93  98  Time: 4802 60 40 15 16  Speed: 94,23 KB/s

Release Device

Clk values are numbers of waiting MCLK cycles during flashing (mass erase, 1st word, n word, block end waiting, programming end waiting). Time is period in us (mass erase, 1st word, n word, block end waiting, programming end waiting) and at the end is maximum practical writing speed.

Master device (SBW+ programer) is measuring intervals between changing P1.0 state on target device...

BRamFlashTest32	bis.b #BIT0, &P1OUT			; Info Hi 

		movx.w R6, 0(R4)
		movx.w R7, 2(R4)

BRamFlashTest33	bit.w #WAIT, &FCTL3
		jz BRamFlashTest33

		bic.b #BIT0, &P1OUT			; Info Low 

Share this post


Link to post
Share on other sites

In the last post there was wrong erase period. It must be around 26 ms.

MSP430F5xx with higher MCLK will have higher flashing rate, due to faster execution of instruction movx.w R6, 0(R4) that writes words to flash and faster hitting BUSY/WAIT (bit.w #BUSY, &FCTL3 / bit.w #WAIT, &FCTL3) period end moment.

Get Device
Device: 0  JTID: 91  Fuse: OK  1A04: 31 80  1A06: 12 12
Device: 1  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10
Device: 2  JTID: 91  Fuse: OK  1A04: 31 80  1A06: 12 12
Device: 3  JTID: 91  Fuse: OK  1A04: 30 80  1A06: 30 10
Device: 4  JTID: 91  Fuse: OK  1A04: 31 80  1A06: 12 12
Device: 5  JTID: 91  Fuse: OK  1A04: 31 80  1A06: 12 12
Device: 6  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10
Device: 7  JTID: 91  Fuse: OK  1A04: 31 80  1A06: 12 12

Flash Test
Freq: 4000 kHz  Block: 128 bytes
Dev: 0  Clk: 105559 247 166  63  64  Time: 26389 61 41 15 16  Speed: 91,1 KB/s
Dev: 1  Clk: 107878 252 171  64  61  Time: 26969 63 42 16 15  Speed: 88,9 KB/s
Dev: 2  Clk: 106315 247 168  64  63  Time: 26578 61 42 16 15  Speed: 90,4 KB/s
Dev: 3  Clk: 102789 242 162  68  59  Time: 25697 60 40 17 14  Speed: 93,4 KB/s
Dev: 4  Clk: 106530 247 168  69  58  Time: 26632 61 42 17 14  Speed: 90,2 KB/s
Dev: 5  Clk: 106107 247 167  68  64  Time: 26526 61 41 17 16  Speed: 90,6 KB/s
Dev: 6  Clk: 105617 247 167  64  61  Time: 26404 61 41 16 15  Speed: 91,1 KB/s
Dev: 7  Clk: 105302 247 166  69  64  Time: 26325 61 41 17 16  Speed: 91,3 KB/s

Flash Test
Freq: 12000 kHz  Block: 128 bytes
Dev: 0  Clk: 316672 705 459 173 181  Time: 26389 58 38 14 15  Speed: 99,3 KB/s
Dev: 1  Clk: 323690 722 470 177 183  Time: 26974 60 39 14 15  Speed: 96,8 KB/s
Dev: 2  Clk: 318957 712 463 174 180  Time: 26579 59 38 14 15  Speed: 98,3 KB/s
Dev: 3  Clk: 308307 687 448 169 175  Time: 25692 57 37 14 14  Speed: 101,7 KB/s
Dev: 4  Clk: 319585 712 464 177 183  Time: 26632 59 38 14 15  Speed: 98,2 KB/s
Dev: 5  Clk: 318335 707 462 177 183  Time: 26527 58 38 14 15  Speed: 98,6 KB/s
Dev: 6  Clk: 316862 707 460 174 178  Time: 26405 58 38 14 14  Speed: 99,0 KB/s
Dev: 7  Clk: 315895 702 458 177 180  Time: 26324 58 38 14 15  Speed: 99,4 KB/s

Same is with MSP430x2xx devices, but here is more important to have MCLK that divided will give value as close as possible to 476 kHz (for example 8 MHz / 17 = 470588 Hz).

Get Device
Device: 0  JTID: 89  Fuse: OK  0FF0: 29 55  0FFD: 01 00
Device: 1  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04
Device: 3  JTID: 89  Fuse: OK  0FF0: 25 53  0FFD: 01 00
Device: 4  JTID: 89  Fuse: OK  0FF0: 25 53  0FFD: 01 00
Device: 6  JTID: 89  Fuse: OK  0FF0: F2 27  0FFD: 01 04
Device: 7  JTID: 89  Fuse: OK  0FF0: 29 55  0FFD: 01 00

Flash Test
Freq: 8000 kHz  Block: 64 bytes
Dev: 0  Clk: 180097 440 291 100 106  Time: 22512 55 36 12 13  Speed: 52,2 KB/s
Dev: 1  Clk: 180097 440 291 100 106  Time: 22512 55 36 12 13  Speed: 52,2 KB/s
Dev: 3  Clk: 180097 440 291 100 106  Time: 22512 55 36 12 13  Speed: 52,2 KB/s
Dev: 4  Clk: 180099 440 291 100 105  Time: 22512 55 36 12 13  Speed: 52,2 KB/s
Dev: 6  Clk: 180097 440 291 100 105  Time: 22512 55 36 12 13  Speed: 52,2 KB/s
Dev: 7  Clk: 180097 440 291 100 106  Time: 22512 55 36 12 13  Speed: 52,2 KB/s

Share this post


Link to post
Share on other sites

Maximum flashing rate for MSP430x2xx devices is around 50 KB/s, but for MSP430x5xx is around 200 KB/s, so I made some optimization, to come closer (from 150 KB/s) to 200 KB/s.

Biggest improvement is that now for sending data to target device over 1-pin interface, 3 CLK cycles per bit on target device are needed, before was 4. Bad thing with new interface is that is sensitive to input state of other port pins on target device that are not used for transfer, and their state must not be changed during flashing. For example if P1.0 is used for transfer, and XT on P1 is clocked from external source (not crystal) than it will not work. However this is not "big" problem, because any PX.0 pin can be used for hi-speed transfer, and it is selectable on the fly, by flashing application on PC side with "-p" switch. All ports are supported, and also port J. This is related only to MSP430x5xx devices, not to MSP430x2xx devices that have low flashing rate, and still use old interface, that is not sensitive to other, not used port pins.

Also, now, there is no more waiting for data on target device except for the first word. Before, waiting for data was on each block start. So, now, flashing is going completely in parallel with data transfer (between flasher and target device).

By simple calculation it was completely clear that flashing rate will go up, and not just by few KB/s. Unfortunately, result was far away from calculation. I tried overclocking to 32 MHz, and thinking about using some other MSP430F5xx device with 64KB RAM. But, in most cases, when there is need for faster/better hardware, problem is in bad software.

And problem was in software, indeed. When I started to work on this project, basic idea was to have big USB buffer, that will provide high transfer rate between PC and flasher. It was used almost all free RAM (5.75 KB) and transfer rate was around 800 KB/s. DMA was used for coping USB data to non-USB RAM, and device was waiting for transfer end before start of flashing target device, because it was not possible to interrupt flashing process with DMA. Now, I found out that this was bottleneck for higher transfer rate, because this waiting period was wasted time (not completely, because during this time SBW code for preparing target device was executed) with too big impact on final flashing rate.

There is no need for high USB transfer at all, because USB just need to follow flashing rate, and execute together (without interrupting) with flashing process. So, in new version there is no DMA, and there is no big USB buffer. USB rate can follow 200 KB/s flashing rate without problems, so USB buffer size is now only 256 bytes, used basicaly like in Nero burning application. In new version there is no more block segmentation of writing command (limited by buffer size), it is sent form PC in complete size.

With old version, 5.75 KB USB buffer was used, and target devices are clocked on 8 MHz, rate for MSP430F5xx was around 150 KB/s. New version have USB buffer with 256 bytes (all RAM is free), and clocking target devices on 6 MHz, with rate for MSP430F5xx about 180 KB/s (190 KB/s for FRAM).

D:\msp430>flash -com 38 -f sbw_test_192.txt -e -w -v -mr

File "sbw_test_192.txt"
196608 bytes

Get Device
Device: 0  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10
Device: 1  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10

Erase

Write
Address: 05C00  Words: 98304
Size: 196608 bytes  Time: 1062 ms  Speed: 180,79 KB/s

Verify
Address: 05C00  Words: 98304
Size: 196608 bytes  Time: 1063 ms  Speed: 180,62 KB/s

Marginal Read
Address: 05C00  Words: 98304
File: C5CD  Device: 0  MR0: C5CD  MR1: C5CD
File: C5CD  Device: 1  MR0: C5CD  MR1: C5CD
Size: 196608 bytes  Time: 2765 ms  Speed: 69,44 KB/s

Release Device

Total Time: 5141 ms

D:\msp430>

Share this post


Link to post
Share on other sites

With new version, almost complete non USB RAM (4 KB) is free, so it is used for recovering original RAM contest for all (max 8) target devices. There was problem with storing data to RAM of MSP430x5xx target devices because of not existing Quick Write SBW command. Using standard SBW Write (instead of Quick Write) is not a option, because it's too slow, so I made small loader to replace not existing Quick Write. Also, done some optimization on SBW code.

E:\msp430>flash -p com8 -f sbw_test_56.txt -e -w

File "sbw_test_56.txt"
57088 bytes

Get Device
Device: 0  JTID: 89  Fuse: OK  0FF0: 29 55  0FFD: 01 00
Device: 1  JTID: 89  Fuse: OK  0FF0: 29 55  0FFD: 01 00

Erase

Write
Size: 57088 bytes  Time: 1152 ms  Speed: 48,4 KB/s

Release Device

E:\msp430>flash -p com8 -f sbw_test_192.txt -e -w

File "sbw_test_192.txt"
196608 bytes

Get Device
Device: 0  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10
Device: 1  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10

Erase

Write
Size: 196608 bytes  Time: 1036 ms  Speed: 185,3 KB/s

Release Device

E:\msp430>

Share this post


Link to post
Share on other sites

PC side is written in Pascal, and plan is to be able to compile it by fpc (http://www.freepascal.org) and run it on any OS (with adding dedicated CDC support in the source file). First SBW+ flashing under Linux (Ubuntu)...

ThinkPad:~/msp430$ flash -p /dev/ttyACM0 -f sbw_test_192.txt -e -w -mr

File "sbw_test_192.txt"
196608 bytes

Get Device
Device: 0  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10
Device: 1  JTID: 91  Fuse: OK  1A04: 54 35  1A06: 10 10

Erase

Write
Size: 196608 bytes  Time: 1040 ms  Speed: 184.6 KB/s

Marginal Read
     File  D0   D1 
MR0: C5CD C5CD C5CD
MR1: C5CD C5CD C5CD
Size: 196608 bytes  Time: 2789 ms  Speed: 68.8 KB/s

Release Device

ThinkPad:~/msp430$

Share this post


Link to post
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!

Register a new account

Sign in

Already have an account? Sign in here.

Sign In Now

×