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MSP430 USB 2 KB RAM (1C00 - 23FF)

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For start, USB RAM description from TI datasheet:

This memory is implemented as "multiport" memory, in that it can be accessed both by the USB buffer manager and also by the CPU and DMA. The SIE allows CPU/DMA access, but reserves priority. As a result, CPU/DMA access is delayed using wait states if a conflict arises with an SIE access. When the USB module is disabled (USBEN = 0), the buffer memory behaves like regular RAM.

 

Topic is about USB RAM if USB is used (USBEN = 1).

 

Maybe good way of coding, can be, to put all vars regarding USB (USB lib/stack) in USB RAM, and all other "main program" (not USB) vars in main RAM space. There are plenty of free space in USB RAM, that can be used without any restrictions.

 

1C00 - 236F is EP buffer area. For typical communication (generic bulk) 1 input EP (64 bytes or 128 bytes if double buffering is used) and 1 output EP (64 bytes or 128 bytes if double buffering is used) is enough. In this case there are 1900 - 2 * 128 = 1640 free bytes in buffer area. Unfortunately, buffer area is on begging, not on the end of USB RAM. In other case (buffer area ending at 23FF) it will be easy to use free buffer space continued to main RAM (2400-...).

 

After buffer area is space for EP0 / setup packet:

USBSUBLK	 0x2380 ; Setup Packet Block
USBIEP0BUF 0x2378 ; Input endpoint_0 buffer
USBOEP0BUF 0x2370 ; Output endpoint_0 buffer
USBTOPBUFF 0x236F ; Top of buffer space

 

Next is description for all output EP:

USBOEPSIZXY_1 0x238F ; OE1 X/Y-buffer size
USBOEPBCTY_1 0x238E ; OE1 Y-byte count
USBOEPBBAY_1 0x238D ; OE1 Y-buffer base addr.
Spare		 0x238C ; Not used
Spare		 0x238B ; Not used
USBOEPBCTX_1 0x238A ; OE1 X-byte count
USBOEPBBAX_1 0x2389 ; OE1 X-buffer base addr.
USBOEPCNF_1 0x2388 ; OE1 Configuration
...
USBOEPSIZXY_7 0x23BF ; OE7 X/Y-buffer size
USBOEPBCTY_7 0x23BE ; OE7 Y-byte count
USBOEPBBAY_7 0x23BD ; OE7 Y-buffer base addr.
Spare		 0x23BC ; Not used
Spare		 0x23BB ; Not used
USBOEPBCTX_7 0x23BA ; OE7 X-byte count
USBOEPBBAX_7 0x23B9 ; OE7 X-buffer base addr.
USBOEPCNF_7 0x23B8 ; OE7 Configuration

 

For used EP there are 2 free bytes for each EP. If EP is not used all space regarding this EP is free.

 

After output EP, is reserved space 23C0 - 23C7, but I made some tests, and it is also free, not reserved.

 

Next is description for all input EP:

USBIEPSIZXY_1 0x23CF ; IE1 X/Y-buffer size
USBIEPBCTY_1 0x23CE ; IE1 Y-byte count
USBIEPBBAY_1 0x23CD ; IE1 Y-buffer base addr.
Spare		 0x23CC ; Not used
Spare		 0x23CB ; Not used
USBIEPBCTX_1 0x23CA ; IE1 X-byte count
USBIEPBBAX_1 0x23C9 ; IE1 X-buffer base addr.
USBIEPCNF_1 0x23C8 ; IE1 Configuration
...
USBIEPSIZXY_7 0x23FF ; IE7 X/Y-buffer size
USBIEPBCTY_7 0x23FE ; IE7 Y-byte count
USBIEPBBAY_7 0x23FD ; IE7 Y-buffer base addr.
Spare		 0x23FC ; Not used
Spare		 0x23FB ; Not used
USBIEPBCTX_7 0x23FA ; IE7 X-byte count
USBIEPBBAX_7 0x23F9 ; IE7 X-buffer base addr.
USBIEPCNF_7 0x23F8 ; IE7 Configuration

 

For used EP there are 2 free bytes for each EP. If EP is not used all space regarding this EP is free.

 

For example, I use with MSP430F5508 complete main 4 KB RAM (2400 - 33FF) as main EP buffer, 1 IEP (64 bytes) and 1 OEP (64 bytes) in USB RAM. Almost all space in 2 KB USB RAM is free and it is used for main program vars. SP is located at 2370.

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Just note about buffer base address pointers (USB*EPBAX, USB*EPBAY, one byte).

 

Pointer calculation: Buff Pointer = (Buff Address - 1C00) / 8

 

This value (USB*EPBAX, USB*EPBAY) can be changed, and it is able to use any space (inside 2 KB USB RAM) for EP buffer.

 

For example, default values:

OEP1_X_BUFF Address 1C00 Pointer 00
OEP1_Y_BUFF Address 1C40 Pointer 08
IEP1_X_BUFF Address 1C80 Pointer 10
IEP1_Y_BUFF Address 1CC0 Pointer 18
...
OEP7_X_BUFF Address 2200 Pointer C0
OEP7_Y_BUFF Address 2240 Pointer C8
IEP7_X_BUFF Address 2280 Pointer D0
IEP7_Y_BUFF Address 22C0 Pointer D8

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During development of SBW programmer, found something strange regarding assembler instruction "mov.w R5, const(R6)" cycle numbers: http://forum.43oh.com/topic/2972-sbw-msp430f550x-based-programmer/?p=30730


It is related to USB RAM, and I will clear the things on this topic.
 

Description from TI datasheet:

 

This memory is implemented as "multiport" memory, in that it can be accessed both by the USB buffer manager and also by the CPU and DMA. The SIE allows CPU/DMA access, but reserves priority. As a result, CPU/DMA access is delayed using wait states if a conflict arises with an SIE access. When the USB module is disabled (USBEN = 0), the buffer memory behaves like regular RAM.

 

Writing/reading to/from USB RAM (when USB is enabled) is delayed and it will take 5 cycles, for any instruction type, for example:

RAM Instruction          Cycles

mov.w @R14, R15             2
mov.b #0FFh, &02B00h        3
mov.w #01234h, &02B00h      4


USB RAM Instruction       Cycles

mov.w @R14, R15             5
mov.b #0FFh, &02340h        5
mov.w #01234h, &02340h      5

 

Something weird with write instruction in combination with other instructions, or what was confusing me, is that write can be used in combination with other instruction after it, still to fit inside 5 cycles. For example, code that write to USB RAM:

mov.w #01234h, &02340h  ; 5               mov.w #01234h, &02340h ; 4
mov.w #05678h, &02342h  ; 5               nop                    ; 1
mov.w #09ABCh, &02344h  ; 5               mov.w #05678h, &02342h ; 4
---------------------------               nop                    ; 1
Total number of cycles   15               mov.w #09ABCh, &02344h ; 5
                                          --------------------------
                                          Total number of cycles  15

 

Reading form USB RAM will take always 5 cycles, without possibility of inserting other instruction.

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Reading form USB RAM will take always 5 cycles...

 

Not correct. Number of cycles during reading is not fixed.

To instruction cycles will be added waiting states. Higher MCLK, more waiting states.

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