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nrf24L01 registers/commands and functions(work in progress)

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nrf24L01.h Contains command and register address definitions.

nrf24L01.c Contains functions (tx not tested but should work, rx not tested)

regs.h Contains settings for the MSP430 and the nrf24L01

main.c - Demo main program code

 

Apparently the nrf24L01 can take a pules on CS without any delay. If any one runs into a problem with this do tell.

 

The delay from PWR_UP being written to CE going high is very crucial. If not observed, the nrf24L01 will not work.

 

Also by the looks of it the nrf24L01 can take 16Mbps SPI. I don't have a logic analyzer to test this, but my code seams to work.

 

regs.h hold a definition "test_config". If it's set to "1" a demo type program will run.

If it's defined as "0" the test code will not be included.

tx1st defines if the nrf will be in tx mode when it power up. If set to "0" nrf will be in RX mode.

The code in main.c should increment the RX_ADDR_P0 then send it to the received address.

If the msp that is transmitting doesn't receive an ACK, it will turn on LED1 and go into LPM4.

This should continue indefinitely. Only the LSB of the address is changing, and should roll over.

 

 

 

tx is working now, tested with msp430g2252 on the tx side and the buspirate on the rx side

rx is still untested. (Will test later)

regs.h

nrf24l01.h

nrf24l01.c

main.c

nrf test.buspirate.txt

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I'll do more work on this when my second launchpad arrives(ordered a few days ago).

 

If any one has any functions they'd like me do add I'm happy do to it.

 

I commented the code, not sure how effective my comments are.

 

Currently the whole thing is compiling to "Code Size - Text: 1012 bytes Data: 28 bytes", so it can be used on the smaller value line chips.

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No, the nrf2401 and the nrf24L01 are fairly different chips. For starters the nrf24L01 doesn't have 2 SPI ports. There seems to be a fair amount of differences in features as well.

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Will your code work with RFM70? I think the chip is nRF24L01 or L01P.

It should. Nordic states the the nRF24L01+ is a drop in replacement, I also had a quick look at the registers, and I didn't see any differences.

 

EDIT: The RFM70 looks to be nRF24L01. Code should work fine. If you have one(RFM70), could you write 0x50,0x53 and then check if the MSB of the status register is set? The datasheet says that will toggle between the first and second register banks, and the second one contains a load of goodies.

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Nice to see some initial support for this, I got an order of 10 cheapo breakout boards from ebay for the nRF24L01+ and have been helping someone over at arduino.cc write a BSD-licensed lib for the chip... Going to download your code soon and take a peek.

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Nice to see some initial support for this, I got an order of 10 cheapo breakout boards from ebay for the nRF24L01+ and have been helping someone over at arduino.cc write a BSD-licensed lib for the chip... Going to download your code soon and take a peek.

Cool, let me know if you find bugs.

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Hmm well I finally put together a boosterpak (toner-transfer PCB) to use my nRF24L01+ modules from some chinese ebay vendor, and it looks like I have IRQ on P1.0 (red LED) and CSN on P1.6 (green LED)... also had to swap in my G2231 as the code uses USI. A couple changes needed to be made to make it compile with my newish GCC, but it runs, doesn't do anything useful yet (I have an arduino + custom shield for using a comparable module which I'll use to transmit/receive test data once I figure out the code).

 

One thing that has me curious though, is the CSN LED is not lit except for a quick flash when it resets. I'd expect that to only go low during SPI I/O, then go high when at rest, so I should see it glowing all the time at idle (LPM4).

 

--edit--

Ah wait, forgot to set the port (CSP/CEP)

 

Anyway, quick summary of changes:

1. Use for everything

2. Added this to nrf24l01:

#define _bic_SR_register_on_exit __bic_SR_register_on_exit
#define _bis_SR_register_on_exit __bis_SR_register_on_exit

 

The build I have seems to require two underscores in front of that.

 

GCC details:

Using built-in specs.
Reading specs from /opt/local/lib/gcc/msp430/4.6.3/../../../../msp430/lib/msp430mcu.spec
COLLECT_GCC=msp430-gcc
COLLECT_LTO_WRAPPER=/opt/local/libexec/gcc/msp430/4.6.3/lto-wrapper
Target: msp430
Configured with: /opt/local/var/macports/build/_Volumes_work_mports_dports_cross_msp430-gcc/msp430-gcc/work/gcc-4.6.3/configure --prefix=/opt/local --target=msp430 --infodir=/opt/local/share/info --mandir=/opt/local/share/man --datarootdir=/opt/local/share/msp430-gcc --with-system-zlib --with-gmp=/opt/local --with-mpfr=/opt/local --with-mpc=/opt/local --enable-stage1-checking --enable-multilib --enable-languages=c,c++
Thread model: single
gcc version 4.6.3 20120301 (mspgcc LTS 20120406 unpatched) (GCC) 

Got that and the msp430mcu pkg installed from macports.

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Eh, looks like the pinout I used for my boosterpak doesn't work with the 2231's USI anyhow... I set it up for the 2553's UCA pins for SIMO/SOMI/CLK. I'll work on building out another boosterpak for the 14pin USI compatible chips (e.g. 2231, which is what I have).

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Still working on this, got a pretty complete library coming together although I've been swamped in SPI hell due to it not working right ... Finally figured it out, USICKPH has to be 1. Also yanked USIGE from USICTL0 since it's not needed.

 

Bought a logic analyzer (Saleae Logic16) which I received tonight, and looking at several scans of the I/O you wouldn't expect anything is wrong, until a single-bit error cropped up which seemed bizarre as it simply shouldn't have happened--I was sampling 16x as often as I needed to. Turns out the waveform (USICKPH=0) looked "almost" right (and once in a blue moon it would mysteriously work), in that MOSI was transitioning but it was doing so at the same time as the SCLK rising edge, when that rising edge is the point where MOSI/MISO gets sampled--so the MOSI transition should have happened beforehand. On the AVR, with an arduino that works reliably with the nRF, it transitions at the falling edge of the prior clock pulse (and 1 clock's width ahead of time before the clock pulses start). Setting USICKPH=1 resolved this; it transitions MOSI on the falling edge of the previous SCLK pulse and pre-sets it before the start of the byte.

 

Anyway, the new library I'm cooking up separates functionality out a bit into the various "state machine" states, has a function to query the state of the device, uses 16-bit SPI (because for reading & writing single-byte registers, why not?) and has #define's in place to make it pluggable to use other drivers--USI (only code I've written yet), eventually USCI and a bitbang SPI. Once I've tested the code well enough to my liking I'll release it on github and post here.

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Got USI, USCI_A, USCI_B all working and confirmed with logic analyzer; had the LaunchPad blinking its red LED with my USCI_B boosterpak installed, responding to periodic (every 250ms) transmissions from an Arduino I had 2ft away. You could see the blinking stop when I hit the arduino's reset button or yanked the nRF transceiver from its shield.

 

Likewise with a PTX test program on the MSP, I had an LED plugged into that arduino lighting up with a receiver sketch running on it.

 

Need to examine the code/clean up anything excessively ugly and document it, then throw it up on github for all to see!

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Official release, sans documentation for the moment-

 

https://github.com/spirilis/msprf24

 

 

Lots of cleanup/changes compared to that .zip file, which I'm going to purge for now (no copyright notice on those files). It's a permissive ISC license. The docs are going to be on the github wiki.

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Official release, sans documentation for the moment-

 

https://github.com/spirilis/msprf24

 

 

Lots of cleanup/changes compared to that .zip file, which I'm going to purge for now (no copyright notice on those files). It's a permissive ISC license. The docs are going to be on the github wiki.

 

 

I just had a look, it's all so clean and pretty. A whole lot better than that thing I posted. Some really fantastic work.

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