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Morgan Meader

Timer initialization and external oscillator problem

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I'm a n00b. Using a F5510 uController...

 

I have a 25MHz external oscillator tied to XT2IN and I want my interrupt to be at approximately 600Hz. The init code looks like this:

 

P5SEL |= BIT2;                                      // Port select XT2IN
UCSCTL3  = 0x0050;                               // FLL SELREF = XT2CLK
UCSCTL4  = 0x0555;                               // set ACLK source to XT2CLK (25Mhz external source)
UCSCTL5  = 0x0000;                  // Divide by 1 which leaves 41666.6667 ticks (round down) 0xA2C2
//UCSCTL6  = 0x10F2;                            // XT1BYPASS (external clock source), SMCLKOFF   
UCSCTL6  = 0xD001;                               // XT2DRIVE (MAX), XT2BYPASS=1, XT2OFF=0, XT1OFF=1
TA0CCTL0 = CCIE;                                   // CCR0 interrupt enabled
TA0CCR0  = 0xA2C2;                 // upmode capture value should be 0xA2C2 if using 25MHz oscillator
//TA0CCR0  = 0x36;
TA0CTL   = TASSEL_1 + MC_1 + TACLR;     // ACLK, upmode, clear TA0R
__bis_SR_register(GIE);                           // enable interrupts

 

My interrupt seems to be running off a 32k clock instead.

 

Any insight would be appreciated.

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You may be selecting the source before it stabilizes, causing it to fall back to an alternative source. Make sure XT2OFFG is clear in UCSCTL7. The TI example program msp430x54x_UCS_8 from the 5418 example programs shows how to configure for XT2 and includes the loop below; there's probably an equivalent one for your chip in the code examples available at http://www.ti.com/product/msp430f5510#toolssoftware.

 

  // Loop until XT1,XT2 & DCO stabilizes
 do
 {
   UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);
                                           // Clear XT2,XT1,DCO fault flags
   SFRIFG1 &= ~OFIFG;                      // Clear fault flags
 }while (SFRIFG1&OFIFG);                   // Test oscillator fault flag

 UCSCTL6 &= ~XT2DRIVE0;                    // Decrease XT2 Drive according to expected frequency
 UCSCTL4 |= SELS_5 + SELM_5;               // SMCLK=MCLK=XT2

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