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MSP430g2552 i2c clock issue

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I am interfacing msp430 with rtc using i2c protocols.here is the program:

WDTCTL = WDTPW + WDTHOLD;
     P1SEL |= BIT6 +BIT7;
     P1SEL2|= BIT6 +BIT7;
     UCB0CTL1 |= UCSWRST;
      UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC;// I2C Master, synchronous mode
      UCB0CTL1 = UCSSEL_2 ;
      UCB0BR0 = 12;
      UCB0BR1 = 0;
      UCB0I2CSA = 0x34;
      UCB0CTL1 &= ~UCSWRST ;  //everythingis fine upto here.scl is high here.

  UCB0CTL1 |= UCTR + UCTXSTT; /// here scl clock goes low.   uctr=1 but uctxstt=0. any suggestions??

   

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I suspect you've posted a snippet of your code?  It's not exactly clear, but it appears you are setting up a Master TX (write) to a Slave.

> UCB0CTL1 |= UCTR + UCTXSTT; /// here scl clock goes low.   uctr=1 but uctxstt=0. any suggestions?? <

At this line you're telling the msp to wait for a TX interrupt, but I don't see where you've enabled any interrupts. Looking at msp430g2xx3_uscib0_i2c_03.c, which appears very similar to your post, there is this line:

  IE2 |= UCB0TXIE;                          // Enable TX ready interrupt

immeadiately preceeding your problem statement.

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You've selected UCSSEL=2, which I believe is SMCLK.

Then, you're dividing it by 12. So you need to make sure that's what you want.

To get more help, look up the USCI-I2C mode chapter in your board's user's guide. For example, if you're using G2553, look up the chapter in the file titled: "x2xx User's Guide".

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