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Found 2 results

  1. I'm working on a reflow controller with a G2553 driving a solid state relay to control power. It also includes a rotary encoder with push button and two 7-segment displays to adjust and display the duty cycle. I've written it in assembler, and all of the activity takes place within the interrupt service routine triggered every 2ms by the watchdog timer in interval timer mode. Between interrupts, the processor sleeps. In assembler, the service routine does its magic in about 0.1ms, or 1/20th of the total time, so there's no danger of an overrun into the next trigger. There are no pin interrupts because the encoder and push button are serviced by polling. I'm thinking about converting the software to Energia to make it more accessible to others, and possibly also to Arduino for the same reason. But I'm having trouble finding Energia or Arduino examples of setting up timer-based interrupts other than fiddling directly with the registers. If anyone can point me to information on any higher-level commands that implement timer interrupts, I would appreciate it. One other general question I have concerns pin interrupts. My understanding is that MSP430 parts can do rising or falling edge interrupts, but I've seen examples of people using "change" interrupts as are available on Atmel parts. Can someone explain how an on-change interrupt is actually implemented for MSP430 parts? Thanks very much.
  2. vinicius.jlantunes

    Use of Timer A interrupts

    All, Here is me again struggling with the timer. What I am trying to do is count to CCR0, passing through CCR1, generating interrupts when timer overflows and when it reaches CCR1 value as well. From TI examples I had understood I should set up something like this, adding code to the appropriate "switch" cases: #pragma vector=TIMERA1_VECTOR __interrupt void Timer_A(void) { switch( TAIV ) { case 2: break; // CCR1 not used case 4: break; // CCR2 not used case 10: P1OUT ^= 0x01; // overflow break; } } Well, it is getting to the ISR no problem, but at all times TAIV = 0x000A (10). Even then, the code in the "case 10" statement is not executed. Also, it seems like the interrupt is not being called when the counter reaches CCR1. Here is the full code. I have commented out my original code in the ISR (which was supposed to toggle the led in P1.0 when counter reached CCR1, and P1.6 when timer overflows). I tried both hexa and decimal numbers in the "case" statements. The part not commented is copied straight from TI's example (msp430x20x3_ta_03, see see slac163 and slaa428) without any changes. Am I doing something fundamentally wrong? Is my intent to do something when timer reaches both CCR0 and CCR1 possible at all? #include <msp430.h> #include <stdlib.h> int main( void ) { //---------------- // // Hardware config // //---------------- // WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer // DCO configuration DCOCTL = CALDCO_1MHZ; //Set DCO to 1 MHz BCSCTL1 = CALBC1_1MHZ; // Calibrate internal clock for 1 MHz // Port 1 configuration P1DIR |= BIT0 + BIT2 + BIT6; P1SEL |= BIT2; P1OUT = 0x00; // Timer A configuration //CCTL0 = CCIE; // Enable interrupts CCTL1 = CCIE; // Enable interrupts TACTL = TASSEL_2 + // Set clock to internal DCO ID_0 + // No frequency divider TAIE + // Interrupts MC_0; // Stopped to begin with CCR0 = 1000-1; // PWM Period (1 us) CCTL1 = OUTMOD_7; // CCR1 reset/set CCR1 = 500; // CCR1 PWM duty cycle //----------- // // Main logic // //----------- // TACTL |= MC_1; _BIS_SR(GIE + LPM0_bits); } //#pragma vector = TIMERA0_VECTOR //__interrupt void Timer_A0 (void) //{ // P1OUT ^= BIT6; //} #pragma vector = TIMERA1_VECTOR __interrupt void Timer_A1 (void) { switch( TAIV ) { case 2: break; // CCR1 not used case 4: break; // CCR2 not used case 10: P1OUT ^= 0x01; // overflow break; } // P1OUT ^= BIT0; // switch (TAIV) // { // case 0x02: // CCR1 // { // P1OUT ^= BIT0; // } break; // case 0x04: // CCR2 // { // // // } break; // case 0x0A: // CCR0 // { // P1OUT ^= BIT6; // } break; // } // return; } P.S.: I am using IAR and the G2231 chip if that makes any difference.
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