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Why on earth would TI engineers use random GPIO pins for the built-in UART BSL instead of RXD/TXD of one of the USCI peripherals?? I mean, in 90% of real world use cases, the likely source of a firmware update, i.e. computer, USB bridge, blue-tooth modem etc., will be hanging on one of the UARTs. Instead they picked 2 pins on the side of the package where all the I/Os are nicely lined up and which therefore most likely would be wired up to all the other stuff. Oh yes, and of course those two pins are exactly on the opposite side of the TEST / BSL enable pin. /rant
