Search the Community
Showing results for tags 'LDMIA IRQ Bug'.
Dear TI geeks, Ulrich Hoffman found a bug while using multitasking in Mecrisp-Stellaris on TM4C1294, which, after a long search, could be tracked down and turned out to be a silicon bug. I wish to share this with you, just in case you run into similiar trouble. Matthias LDMIA and some other opcodes with a register list can be interrupted and continued afterwards in M3 and M4 cores. Unfortunately, there seems to be a silicon bug in some chips / core revisions that causes an interrupted LDMIA opcode to fail. The error has already been observed in LM4F120, TM4C1294, STM