Jump to content

krishnat

Members
  • Content count

    9
  • Joined

  • Last visited

  1. krishnat

    using TIVA C tm4c123gh6pm ADC with Comparator and uDMA

    According to datasheet, if I set system clock 16 Mhz then only for 1msps setting, conversion time will be 1us. What will be conversion time if I set System clock 40 Mhz, 1msps setting..?? OR What will be conversion time if I set System clock 80 Mhz, 1msps setting..?? What will be conversion time if I set System clock 40 Mhz, 1msps setting..??
  2. krishnat

    ADC interrupts for Tiva C Series

    Hi , which systemclock should I configure with ADC & timer module ( I am using both module in same code)..?? SysCtlClockSet(SYSCTL_SYSDIV_2_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 80MHz SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 50MHz SysCtlClockSet(SYSCTL_SYSDIV_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 40MHz If I dont write any of above, I get :: freq = SysCtlClockGet(); // 16MHz My requirement is lowest execution time. Should I configure to 80MHz..?? If I do so will both ADC and Timers will work fine..?? Is any extra configuration needed...? Regards, Krishnat
  3. krishnat

    tiva c verifying system clock frequency

    Hi , which systemclock should I configure with ADC & timer module ( I am using both module in same code)..?? SysCtlClockSet(SYSCTL_SYSDIV_2_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 80MHz SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 50MHz SysCtlClockSet(SYSCTL_SYSDIV_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 40MHz If I dont write any of above, I get :: freq = SysCtlClockGet(); // 16MHz My requirement is lowest execution time. Should I configure to 80MHz..?? If I do so will both ADC and Timers will work fine..?? Is any extra configuration needed...? Regards, Krishnat
  4. krishnat

    Execution time - the easy way

    Hi , which systemclock should I configure with ADC & timer module ( I am using both module in same code)..?? SysCtlClockSet(SYSCTL_SYSDIV_2_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 80MHz SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 50MHz SysCtlClockSet(SYSCTL_SYSDIV_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 40MHz If I dont write any of above, I get :: freq = SysCtlClockGet(); // 16MHz My requirement is lowest execution time. Should I configure to 80MHz..?? If I do so will both ADC and Timers will work fine..?? Is any extra configuration needed...? Regards, Krishnat
  5. krishnat

    using TIVA C tm4c123gh6pm ADC with Comparator and uDMA

    Hi , which systemclock should I configure with ADC & timer module ( I am using both module in same code)..?? SysCtlClockSet(SYSCTL_SYSDIV_2_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 80MHz SysCtlClockSet(SYSCTL_SYSDIV_4 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 50MHz SysCtlClockSet(SYSCTL_SYSDIV_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); freq = SysCtlClockGet(); // 40MHz If I dont write any of above, I get :: freq = SysCtlClockGet(); // 16MHz My requirement is lowest execution time. Should I configure to 80MHz..?? If I do so will both ADC and Timers will work fine..?? Is any extra configuration needed...? Regards, Krishnat
  6. krishnat

    How to start with TIVA C lauchPad

    hi, thanks for reply. Doing same. Referring example..Reading datasheet and docs in 'doc' directory. ?But this gives me very narrow application specific information. As I said, I did ADC & timer module. so I get only info. abt ADC in single channel scan ss3 with software trigger and timer with normal operation. There are many more feature in ADC and timer itself, that i dont know how to do. Again when we use these module together, there are more problems. When I integrate ADC and Timer, 'HardFault error' was showing... I search abt that..it was related to interrupt priorities.. I dont know much abt interrupt..so I removed interrupt of ADC , config. it for 'always mode'.. and problem solved.. So I m learning.. Anybody working on same...please share ur experience.. any documents, notes, tutorials, videos.. So the learning procedure will be faster... Regards, Krishnat
  7. krishnat

    How to start with TIVA C lauchPad

    I started learning TIVA C launchPad from past 15 days only . I am watching youtube videos. and refering datasheet. I wrote code in DRM style ,ie. direct register assignment method as shown in videos. I know little only about ADC , timer as I used these modules only. I want to learn API style coding using tivaware. How do I start..? there are many doc and videos that talks about how to install tivaware, CCS or IAR workbench. there is pdf by TI -> ' TivaWare
  8. krishnat

    using TIVA C tm4c123gh6pm ADC with Comparator and uDMA

    Till date my problem is solved. In my application pulse with is 100 us now, so no need to go for Comparator and uDMA. Simply ADC in continuous sample mode, take sample and check tricks worked. I wrote code in DRM style .(direct register assignment method) I know only about ADC , timer as I used these modules only. I want to learn API style coding using tivaware. How do I start..? there are many doc and videos that talks about how to install tivaware, CCS or IAR workbench. there is pdf by TI -> ' TivaWare
  9. Problem: I have one pulse as shown in fig. Pulse width is 10 to 25 us. But next pulse will come after 100 ms. I need to find peak of each pulse. I have reference peak value. I need to generate error send to DAC module. FIG.1 In my current code, If I take one sample and check whether peak or not, and calculate error send to DAC, this code takes 35 us time.That means pulse is gone. How should I tackle this situation FIG.2 I have one solution, I want suggestion from you , whether it is feasible or not?? ADC0 and ADC1- same pulse as input ADC0-Comparator ADC1-uDMA module I will configure my ADC0 module for digital comparator for HIGH band in always mode. I will start my uDMA module to store ADC1 samples until my comparator output is High. Once comparator output is LOW, I will start find peak out of stored samples & generate error send to DAC module.
×