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JRDavisUF

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JRDavisUF last won the day on July 23 2017

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About JRDavisUF

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  1. JRDavisUF

    Compiler option change with latest board file

    Looks like -Os has returned in 5.25.1
  2. https://github.com/energia/msp432r-core/issues/34
  3. JRDavisUF

    Compiler option change with latest board file

    https://github.com/energia/msp432r-core/issues/29
  4. FWIW, I believe modes 2 and 3 should be swapped too.
  5. With the 5.25.0 msp432pr board file update, my SPI stuff has stopped working. Some time back, there was an issue with spi modes 0/1 being switched. As such, that was the direction I was looking to try and figure out my current problem. While digging around I noticed this: 5.23.1\cores\msp432r\ti\runtime\wiring\SPI.h #define SPI_MODE0 SPI_POL0_PHA0 #define SPI_MODE1 SPI_POL0_PHA1 #define SPI_MODE2 SPI_POL1_PHA0 #define SPI_MODE3 SPI_POL1_PHA1 5.25.0\cores\msp432r\ti\runtime\wiring\SPI.h #define SPI_MODE0 SPI_POL0_PHA1 #define SPI_MODE1 SPI_POL0_PHA0 #define SPI_MODE2 SPI_POL1_PHA1 #define SPI_MODE3 SPI_POL1_PHA0 If I swap the definitions for SPI_MODE0 and SPI_MODE1 my code works again. So has the mode swapping problem re-appeared?
  6. In the most version of the MSP432R board file (5.23.1 -> 5.25.0), the optimization levels were changed from -Os (optimize for space) to -O0 (no optimization). As a result, my code chokes on an error in CCSv9.1 which looks like this: `.rodata' will not fit in region `FLASH' c:/ti/ccs910/ccs/tools/compiler/gcc-arm-none-eabi-7-2017-q4-major-win32/bin/../lib/gcc/arm-none-eabi/7.2.1/../../../../arm-none-eabi/bin/ld.exe: region `FLASH' overflowed by 29204 bytes I'm able to fix, by changing the optimization level in CCS via the attache pic, but I was wondering, is this a permanent change? Was there some technical reason for it? Will it be permanent? thx. jrd
  7. JRDavisUF

    Win10 CCS9 rodata overflow

    I was able to figure out the issue and a work around. Turns out that the problem was Energia-related, not CCS specifically. In the most version of the MSP432R board file (5.23.1 -> 5.25.0), the Energia folks switched from -Os (optimize for space) to -O0 (no optimization). As such, I believe when I was upgrading versions on my code, I created a new project, which used the new compile option which blew up everything.
  8. JRDavisUF

    Win10 CCS9 rodata overflow

    My Win10 Code Composer v9.1 (which had been up-to-date yesterday) came up with a needed update today...so I ran it. Now, my Energia(21)-based code (msp432p401R) is splitting out this error (built using "debug"): `.rodata' will not fit in region `FLASH' c:/ti/ccs910/ccs/tools/compiler/gcc-arm-none-eabi-7-2017-q4-major-win32/bin/../lib/gcc/arm-none-eabi/7.2.1/../../../../arm-none-eabi/bin/ld.exe: region `FLASH' overflowed by 29204 bytes Somehow, with this new CCS update, my flash usage has increased by 30k (pretty significant given the limited about of space on the msp432s). Anyone else run into this? Is there some compile option which I need to tweak to get it back to the previous flash footprint? thx. jrd
  9. JRDavisUF

    Is MSP432P4111 supported by Energia?

    OK. I'll see what I can do to help. I just bought one, so we'll see how it goes! I see 5.25 has the P4111 as an unimplemented variant. Where can I find the source for the board files in github? I tried this location but its 5.6.1: https://github.com/energia/msp432r-core/tree/master/variants/MSP_EXP432P401R
  10. JRDavisUF

    Is MSP432P4111 supported by Energia?

    So is Energia itself dying/dead? There doesn't appear to be much going on...we are pushing a year since an upgrade...The P4111 has been out for over 2 years with claims by TI to be supported by Energia and it still isn't and doesn't seem like it will be any time in the near future. Is this a lack of interest by TI? Are they planning on dropping the Lauchpads? A lack of support in community? ... or has the product just sort of reached it's natural life and people have moved on. I like the product, but I'm beginning to feel alone in the world
  11. According to MSP432P4111 Launchpad User's guide (Revised Jan 2019: http://www.ti.com/lit/ug/slau747b/slau747b.pdf) Page 22: "Your device is also supported by the Energia IDE" However, I see no mention of the P4111 in the board manager 1.8.7.E21 (Win10) ...only the P401R and the E401Y. Is this board actually supported? ...perhaps by selecting the P401???
  12. It was showing up in Energia, just not in CCSv9...but for some reason its there now (pic below is what I was talking about). Coincidentally, wth the TivaC board added to fix the dslite problem and the msp432e appearing, the TivaC board doesn't show up...Should that one be listed to? It's just a little unclear as to whether or not all of the boards supported in Energia are supported in CCSv9. I know in the past there were some compatibility issues, I just wasn't sure if those issues still persisted. Regardless, the MSP432E board appears now, so i'm ok now.
  13. Done. https://github.com/energia/msp432e-core/issues/6 I do see where you can create a new MSP432E CCS project in Code Composer 9, but it doesn't appear to be possible to create a MSP432E Energia Project yet...Is that correct?
  14. I'm trying to get Energia21 working with my MSP432E (which I'm still struggling with) and ran into a problem. The platform.txt file references dslite 7.2.0.2096. However, to get this version of dslite, I must install the TivaC board...which installs this version of dslite in .../Energia15/packages/energia/tools/dslite. It seems like there is a mismatch between the dslite version that the v5.19.0 msp432e board is installing and the platform.txt file jrd PS FWIW, now that I fixed this, I get a "Frequency out of range error"...I tried other versions of dslite (6.2.1.1594, 8.0.0.1202, and 8.2.0.1400) to no avail.
  15. I'm using CCSv8 and Energia on a Win10 machine. In my energia code, I have a bunch of setup/loop routines (setupA/loopA, setupB/loopB, etc.) routines as separate files . I'd like to be able to use CPP (#define/#ifdef/etc.) to control whether certain setup/loop tasks are included in the build by essentially making the content of an individual file empty. If I build the code with a certain setup/loop included and then try to use CPP to exclude it, the compiler is still looking for the one I have now excluded and fails the compilation process. I understand that because the setup/loops were in the previous build, that the setup/loop I have now excluded is still included in the build process somewhere, however, I cannot figure out how to get CCS to re-parse all of the files and recognize that this setup/loop is no longer needed. I thought the "rebuild" or "clean" options would do this, but they don't. I am using the Debug build and I can delete that whole directory and it's still looking for the excluded setup/loop. I tried creating an empty .ino file and that seems ok, so I know empty files don't actually require setup/loops within them. None of the files within the CCS GUI seem to mention the excluded file. If I add a new setup/loop, CCS finds it just fine, it's just the removal of them that seems problematic. As a work around, I can create a new project and then copy all of the needed files (not the excluded one) over to it, but this is a bit of a pain and seems like overkill. Does anyone know how to get CCS to update the list of needed setup/loops in the build process for an existing project? thx, jrd
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