Toby got a reaction from Groverkaw in Understanding SPI read from slave
Ive recently started looking at using the F2802x SPI. For my application I would like to be able to communicate between two F2802x devices a string of 8-bit chars of arbitrary length (+using FIFOs), and I have a few questions.
The slave device is able to request read service from the master by means of a GPIO line to the master that the master has configured as an external interrupt.
The thing is I am not understanding the steps required for the master to begin a read from the slave.... I checked out the data transfer example (sect 1.5.5) in the SPI ref guide (SPRUG71B) but TBH I didn't really understand what it was trying to convey...
I guess the master needs to transmit dummy bytes for every byte that it wants to receive, is that right?
But how should the master "know" how many bytes that should be? Maybe it just keeps going until the slave clears the TALK bit?
Toby got a reaction from msptest6 in Ramp DAC on F28027
I found this in "development_kits/~SupportFiles/F2802x_headers/" along with the PeripheralHeaderIncludes.h file.
I compiled, loaded and ran the program without errors - though have not yet actually tested functionality
I tried restarting CCS (and my machine) to see if this would induce the indexer to re-index the _Comp header file, but no change, never mind.
Thanks for the EALLOW mention, hadn't thought about that!
P.S. I'll cross-post my solution to the e2e for anyone looking for a solution there also
P.P.S. Have somewhat confirmed my changes by comparing the F2803x _Comp.h (as Devin suggested) in which the ramp registers ARE defined, and also has no mention in the relevant PeripheralAddress_ASM.h so I guess I dont need to add anything there.
Also fixed the indexer issue by 1) exporting my preferences 2) restarted CCS with the -clean arg, then closed CCS again 3) Cleaned my workspace 4) Re-opened CCS and imported my preferences and project (had to re-setup my perspectives also). 5) Bingo!
Instructions for the steps can be found on the TI wiki here. Step 2 is probably redundant but I tried it just to be sure!
Also, on comparison to F2803x header I changed my DAC_CTL bit 14:15 from FREE to FREE_SOFT
Toby reacted to TI_Trey in Ramp DAC on F28027
I'm not an expert on the comparators, but I'll do my best to answer your question.
I too have been unable to find these registers in the normal header file structures, but I was able to find the DACVAL register in the comparator structures. I believe what is going on here is that the ramp generator was a feature that was not documented for a long while. Someone eventually got time to test and document this feature and it was probably added to the device after the device was released. While it was added in the documentation, the necessary software updates probably got lost and hence you don't see the register in the header files.
That said, the ramp generator is included in the new comparator drivers which are currently in controlSUITE. You'll see its defined in f2802x_common/include/comp.h, but there are no driver APIs to use it. You ought to be able to easily write some drivers for yourself in comp.c that access these registers as you please.
I'll follow up on this and ensure this is true and if so file a bug to get this fixed. Thanks for bringing this to my attention.