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About andrea_mori

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  1. I was joking too, and I appreciate a lot your irony, "oxygen free copper wires facing towards Mecca" was fantastic! Now is more clear, I'm looking to avoid reading a thousand pages. As I understand I cannot use USB with my oscillator as the external clock, because USB interface requires multiple of 1 MHz clock, so I'll use the SD as the storage device. Thinking to the TDA1541A firstly... I have to replace the onboard 8 MHz HSE with mine 11.2896 MHz. I believe I have to desolder the 8 MHz crystal and a pair of capacitors, I'm not sure since I have no schematics of the Disco boa
  2. The PCB layout is the last thing I'm thinking now, as you said there is much road to get this project working. Usually I listen to a Steinway piano solo rather than Nina Hagen. Ok, I start considering to get the right timing from the cpu, so I need to replace the original HSE clock of the Disco board with my oscillator. The original is 8MHz, mine is 11.2896MHz. I presume that I have to change something in some headers to tell the cpu is running at a different frequency. Am I wrong? Using SPI to output bits, I can use SCLK as the bit clock for the DAC and MOSI to pump the bits in th
  3. Thanks again for the replies. I well know this is very complex, and I'm almost ready for the challenge. I'm going to buy the STM32F4 Disco with base board and LCD expansions to start experimenting, but I'm confused about uC implementation, so I ask you more suggestions. For the critical clock at 44.1 kHz (WS/LE) I'll derive it from master clock dividing by 256 with a pair of 74LVC161, because I believe they produce less jitter than the cpu. Also for the bit clock, I can derive it from the divider (dividing by 8). As for left open the two options, discrete DAC and TDA1541A in si
  4. The TDA1541A is a difficult beast, but IMHO it's the best sounding DAC ever built. My reference is a Naim Audio CD3, it sounds wonderful, not very far from vinyl. As I said above, I have two options: the discrete dac or the 1541. In the first case, I have to feed the 595s input, as you said I could use the cpu clock, and then I have to clock the 595s to output parallel data every 256 master clock cycle. In the second case, using OB simultaneous mode, I should split data for each channel to feed simultaneously the DAC, the bit clock could be generated from the cpu, then I should prov
  5. What I meant is that my first problem is to define the right architecture of the system, since I have no experience with uC. Dac choice aside, monolithic or discrete, I would design a system rather than a dac or an SD card transport. The reason is that I'm worried about the jitter of an asynchronous system, where transport and Dac are different devices with their own master clock. SO, I would place the master clock of the entire system close to the DAC. In other words, I would pull data from the uC output (SPI?), rather than push the data from the uC. In this way I have a precise clock
  6. Thanks again for the reply. About my last link: not all are audio fanatic and integralist, Scott Wurcer has an engeneer approach, not religious, he is the designer of the AD797 in Analog Devices. This is a commercial DAC using R2R ladder http://www.totaldac.com/D1-single-eng.htm The crystal oscillator was measured with a R&D FSUP by a dutch guy, attached image. About the glitch: FDS8958 has relatively high input capacitance. Could that help to reduce the glitch, smoothing the transiction? The output impedance of a ladder network should be equal to R, in my case 1K o
  7. Thanks for the tips. Another link: http://www.diyaudio.com/forums/vendors-bazaar/259488-reference-dac-module-discrete-r-2r-sign-magnitude-24-bit-384-khz-14.html Glitching aside, I would use 2K/1K or 1K/500R resistors and around 6V for the ladder, to get at least 2V rms at the output, to drive directly an ampli without any buffer. The DAC will be voltage output. Maybe I'm wrong, but I'm not much worried about the R2R linearity, rather I'm worried about the jitter. I thought to use an STM32F407 or 429 Discovery, with Base board and LCD expansion. I don't know if I can use my e
  8. As I said above the great issue in digital to analog conversion is the jitter, when the system doesn't run totally synchronized. Do you say the only way to read data from SD card is using a FIFO? Do you think it's a "bit perfect" way? I could mask the clock of the 595s, storing each incoming bit only when the uC enables to do that.
  9. The resistors I'm planning to use are ±0.01%, 0.05ppm/°C, so I don't think to have any issue of precision and thermal stability. Also, thermal drift affects the conversion in long time, that's not a great issue. I'll use the 74LVC595, fast enough to switch at 352 kHz, but I'll don't use it to drive the ladder network, because of its relatively high RDSon. The ladder network will be drived by dual mosfet such as FDS8958 or so. I don't own the gears to measure the final precision, but on the sheet I don't see great problems. The final judge will be the ears. I'm enough sure about the digit
  10. I'm planning to use 0.02% or 0.01% resistors, so I can easily reach 16 bit precision. Modern bitstream DAC are surely cheaper, but IMHO they sound bad. I already own a SD card player that outputs I2S, used to feed a TDA1541A, an old DAC that sounds much better than the modern DAC. Now I would build an integrated system, to minimize the jitter, so I'm thinking to a uC feeding a discrete R2R DAC, using a very low phase noise master clock (-130dBc@10Hz from the carrier).
  11. I need a little help to choose the right device. I would build a digital audio player with the following characteristics: - it should read data from SD card only (up to 32GB size) - SD card will be formatted FAT32 - the root of SD card will contain folders only (named as album title/artist) - no subfolders will be allowed on SD card - each SD card folder will contain wav files only (named as title track) - only 16 bit / 44.1 kHz wav files will be allowed (CD quality) - music data should be read and managed synchronously - 6 buttons have to be managed: previous track, next
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