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    sumotoy reacted to grahamf72 in Bug in SPI Library?   
    I finally managed to track down the register documentation for the Stellaris processor (for some reason i couldn't find it on Ti's site), and it all makes sense now.  
    The SPI clock frequency is set by 2 registers - CPSDVSR (Clock Prescaler) & SCR (Serial Clock Rate) by the formula SSI Clock = System Clock / (CPSDVSR * (1 + SCR))
    Energia's setClockDivider just sets the Clock Prescaler register. According to the spec's of this register it must be an even number between 2 & 254. The LSB is ignored. Consequently by calling the routine with a divisor of 1, it was actually storing 0 and hence seems to go to some error state - the doc's don't say what happens when this is set to 0.  
    Another limitation is that it won't allow any frequency above 25Mhz for the SPI. Unfortunately it is not possible to achieve the 25MHz maximum SPI speed with a system clock of 80MHz. The following are some of the valid combinations of registers and resulting frequency
    2         1    20MHz    4          0      20MHz
    2         2    13MHz    4          1      10MHz
    2         3    10MHz    4          3      5MHz
    2         4    8MHz     4          4      4MHz
    2         7    5MHz     4          9      2MHz
    2         9    4MHz     4          19     1MHz
    2         15   2.5MHz
    2         19   2MHz
    The function ROM_SSIConfigSetExpClock sets the registers in such a way that you get the frequency closest to the frequency set in that function.  Because setting it 16MHz (as suggested in your comment on the github page) is actually impossible, it actually sets the speed to 20MHz.  I'd suggest an improvement would be in the config to set the CPSDVSR to 2, and the SCR to 9 to get the default 4Mhz clock. Then in setClockDivider change the SCR rather than the CPSDVSR.    
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