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akfisherman

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About akfisherman

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  1. Moving the P5SEL before the loop solved the problem. Thanks for that tip. My issue now is that the XT2 frequency doesn't change when I change XT2DRIVE_x. It always stays at 4 MHz. Am I misunderstanding that the freq can be altered above 4 MHz??? In the datasheet it shows XT2DRIVE_1 = 12 MHz XT2DRIVE_2 = 20 MHz. One strange think is the MCLK and SMCLK will only work if they're set to XT1 and not DCO. It works and I can alter the freq up to 25 MHz so I'm not going to complain but can anyone explain this? UCSCTL4 |= SELM__XT1CLK + SELS__XT1CLK; WORKS UCSCTL4 |= SELM__DCOCLK + SELS__DCOCLK; DOESN'T WORK
  2. I'm trying to run my ACLK from XT2 and the MCLK, SMCLK from DCO. According to the datasheet I should be able to do this. I'm using a MSP430F5529LP. If I remove the stabalization loop from the code I get 7.8 MHz from all the clocks. I can never get the ACLK to work with XT2 even if I remove all traces of DCO, MCLK, SMCLK. What am I missing to enable XT2???????? void main(void) { Port_Mapping(); // Access port mapping code for MCLK output Pin SetVcoreUp (0x01); // Increase Vcore setting to level 3 to support 25MHz. SetVcoreUp (0x02); SetVcoreUp (0x03); WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer /////// Clock Settings ////////// // Loop until XT1,XT2 & DCO stabilizes do { UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG); // Clear XT2,XT1,DCO fault flags SFRIFG1 &= ~OFIFG; // Clear fault flags } while (SFRIFG1&OFIFG); // Test oscillator fault flag UCSCTL1 |= DCORSEL_4; // DCORSEL =4 (12.3 to 28.2 MHz range) UCSCTL4 |= SELM__DCOCLK + SELS__DCOCLK + SELA__XT2CLK; //Selects MCLK, ACLK, SMCLK UCSCTL6 &= ~XT2OFF; UCSCTL6 |= XT2DRIVE_2; // XT2DRIVE 0 is 4 MHz, 1 is 12 MHz, 2 is 20 MHz, 3 is 32 MHz UCSCTL2 = 762; // Should give 25 MHz from DCO UCSCTL8 = SMCLKREQEN + ACLKREQEN; /////// Output Pins ///////// P2SEL |= BIT2; // SMCLK Output Pin P2DIR |= BIT2; P1DIR |= BIT0; // Output for ACLK P1SEL |= BIT0; P5SEL |= BIT2 + BIT3; // Port select XT2
  3. It should be dividing the incoming signal by 8. Is 20 MHz to high of a frequency? Even if I lower the incoming freq to 5 MHz it still doesn't work. I'll look at the link you sent. Thanks TA0CTL= TASSEL__TACLK + MC__UP + ID_3 + TAIE; //set External clock, up mode, divide by 8, enable interrupt
  4. I'm trying to find the frequency of an incoming signal. I set the incoming signal (sine wave = 162 MHz, amp=3V) as the clock for TimerA0. TimerA2 will be used to keep count in order to calculate the frequency. Once the freq is calculated I'm setting the DCO for the SMCLK. Frequency should be around 20 MHz. The TIMER_A2 ISR is not accessed at all. Not sure if the correct ISR is being used or even if this is the best/simplest way to find the frequency. Thanks void main(void) { Port_Mapping(); // Access port mapping code SetVcoreUp (0x01); // Increase Vcore setting to level 3 to support 25MHz. SetVcoreUp (0x02); SetVcoreUp (0x03); WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer /////// Clock Settings for SMCLK and ACLK ////////// UCSCTL1 |= DCORSEL_4; // DCORSEL =4 (12.3 to 28.2 MHz range) UCSCTL4 |= SELM__XT1CLK + SELS__DCOCLK + SELA__XT1CLK; //Selects MCLK, ACLK, SMCLK UCSCTL8 = SMCLKREQEN + ACLKREQEN + MCLKREQEN; /////// Output Pins ///////// P2SEL |=BIT2; // SMCLK Output Pin (ACLK is same pin as TA0CLK input) P2DIR |=BIT2; P1DIR &= ~BIT0; // Input for TA0CLK P1SEL |= BIT0; ///// // TimerA0 Settings (Used with incoming signal from PSTAR) ///// TA0CTL= TASSEL__TACLK + MC__UP + ID_3 + TAIE; //set External clock, up mode, divide by 8, enable interrupt TA0CCTL1 = CM_1 + CAP + OUTMOD_4; // capture on rising edge, capture mode enabled, Toggle output TA0CCTL0 |=CCIE; // capture compare interrupt enable TA0CCR0 = 1000; // 1000 rising edge samples (should take 50 us) 20MHz/(1/50us) /////// TimerA2 Settings (Used to calculate frequency of incoming signal) ///// TA2CTL= TASSEL__ACLK + MC__CONTINUOUS + TAIE; // select ACLK, continuous mode, enable interrupt TA2CCTL1 = CM_1 + CAP + OUTMOD_7; // capture on rising edge, capture mode enabled, output set to reset/set TA2CCTL0 |=CCIE; // capture compare interrupt enable _EINT(); //Global interrupt enable _bis_SR_register(GIE); } /////// Timer_A2 ISR //////// int static timer_count = 0; // Variables used in TIMER ISR int frequency_input; int frequency_output; int n; #pragma vector=TIMER2_A0_VECTOR __interrupt void TIMER_A2 (void) { if (TA0CCR0 == 1) { timer_count++; // Starts count and is associated with TIMER A2 } if (TA0CCR0 == 1000) { //// Configure SMClK based on timer_count result //// frequency_input = 1000/timer_count; // Calculation of input frequency based on 1000 rising edges frequency_output = frequency_input/32768; // Multiplier calculation for DCOCLK register for SMCLK frequency n = frequency_output - 1; // variable for register setting of DCOCLK UCSCTL2 = n; // for DCOCLK frequency multiplier used by SMCLK P4DIR |= BIT7; // LED 2 turns on to verify ISR is being accessed P4SEL &= ~BIT7; timer_count = 0; // Reset timer_count for next TA0CCR0 up count } }
  5. I'm having problems getting my clocks to work at 25 MHz. I believe the problem is stepping up the VCore to the correct voltage. I've done it before using the MSP430F5438. Maybe there is a specific way to step up the voltage for the 5529LP? Right now my clock outputs 4 MHz. For the MSP430F5438 I used the attached IncrementVcore.h would run the file in the main 1,2, or 3 times based on what frequency range I needed. I had to port map the MCLK since it doesn't have a connected output pin on the 5529LP. void main (void) { IncrementVcore(); //needed for the increase in clock speed IncrementVcore(); IncrementVcore(); UCSCTL1 |= DCORSEL_4; // DCORSEL =4 (12.3 to 28.2 MHz range) UCSCTL4 |= SELM__DCOCLK + SELS__DCOCLK; //Selects MClk and SCLK UCSCTL2 = 762; //multiplier bits for frequency 25 MHz/32768=763 __disable_interrupt(); // Disable Interrupts before altering Port Mapping registers PMAPPWD = 0x02D52; // Enable Write-access to modify port mapping registers PMAPCTL = PMAPRECFG; // Allow reconfiguration during runtime P4MAP1 = PM_MCLK; // Output MCLK to pin 4.1 P4DIR |= BIT1; // Set as output pin for MCLK P4SEL |= BIT1; PMAPPWD = 0; // Disable Write-Access to modify port mapping registers __enable_interrupt(); // Re-enable all interrupts IncrementVcore.h
  6. Still working on this issue. I'm the administrator on my laptop so it shouldn't be an issue with permissions. I downloaded SLAC632 zip file from TI but that didn't help. Tried to install DPInst file and it says "unable to find any drivers designated for your machine". I'm trying to use CCS 6.0 but I can't get passed Windows properly detect the 5529LP.
  7. I was trying to connect my 5529 Launchpad to my win 7 32-bit laptop. When I try to update the drivers for the device I get an error saying "Windows found the drivers but encountered an error". I noticed that the 5529LP shows Access is denied. I can plug it into my Win7 64-bit desktop and it comes up just fine.
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