robomon got a reaction from ausonweng in Designing a Logic analyser using GPIO <-> DMA <-> USB
I am planning to build a logic analyser using my Tiva-C launchpad. I have seen a logic analyser using the SUMP protocol but it uses the USB CDC (serail port) to transfer data.
I need a better sampling rate for my GPIO. My plan is to copy the contents of GPIO data register using DMA into the USB FIFO. Then use some custome device driver in USB to transfer data to PC instead of using USB CDC class drivers.There is a similar example for STM32(but for a different application)
How to find out the sampling rate for a GPIO ?
If I use DMA to copy the data from GPIO, will the performance(i.e sampling rate) of the logic analyser increase ?
Could anyone let me know how fast DMA can copy data from GPIO and write to USB FIFO ?
How fast can USB CDC then transfer data to the PC ? Do I have to implement USB "BULK" mode(or some custom driver) to transfer data?
I found that Saleae logic analyser uses this same concept(copy data from GPIO directly to USB) http://www.saleae.com/logic
There is a open source driver for this device to understand the implementation http://sigrok.org/wiki/Fx2lafw
Is it worth to design a logic analyser using GPIO <-> DMA <-> USB concept if there wont be much improvement in the performance since there already exist one based on the SUMP protocol(the first link that I have shared).
robomon reacted to Lyon in How to send 1MSPS 12bit ADC samples via USB FS
But take into account you do not need too many samples to take - depending on your viewport, 100 points (samples) may be enough. You cannot compress pixels/points - this is usual the limit of eye resolution (although you may protest to this assertion…) and while you transmit a buffer with 100 samples, another one is to be acquired, so some hardware/software parallel processing.
Tektronix used (at the beginning of DSO era) to take such amount of samples and then to interpolate between points to give some extra resolution. This was until someone developed the 1Gs/s sampler and this is the stage today (interpolation was with problems, many people unhappy with waveform displayed).