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Hadn't it been for a logic analyzer, I wouldn't have solved it. This is what happened during single transfer: 0x02 0x03 0x03 0x00 0x07 0xd0 0x91. RTS (second timeline) is asserted just before entering stateTransision() and deasserted just after return from this function. Notice how, after the address byte, the code in stateTransition executes swiftly. The gap between address byte and the payload, which allows the address byte to be received correctly, is caused by the fact that, in order to emulate 9-bit UART on a laptop virtual COM, I have to change parity from 'Mark' to 'Space'. Then a

Aha, I forgot to add, that the same function is invoked on TX interrupt, thus the 'if' part.

Hello, Lastly I have whipped up a state machine based protocol for sending small frames using 9-bit address mode. Ft232rl, wrapped up in the MMusb232rl board, doesn't support this mode directly, so I am leaning on changing the parity bit to mark or space to simulate the address bit on the PC side. Everything works as a charm when I single step the program on the PC. Just on a sidenote, this program is coded in Qt using QtSerialPort. However, when I let the program run as it normally would in a production environment, the uC only receives several bytes out of the whole packet. I have observed