Jump to content

AriZuu

Members
  • Content Count

    4
  • Joined

  • Last visited

  • Days Won

    1

AriZuu last won the day on April 11 2015

AriZuu had the most liked content!

About AriZuu

  • Rank
    Noob Class

Contact Methods

  • Website URL
    http://stonepile.fi/author/ari/

Profile Information

  • Gender
    Not Telling
  • Location
    Lemi, Finland
  • Github
    http://github.com/AriZuu
  1. AriZuu

    How to use mspgcc?

    Hi, Try something like: msp430-gcc -mmcu=msp430g2533 -Os -c test.c msp430-gcc -mmcu=msp430g2533 -o test test.o msp430-objcopy -O ihex test test.hex Replace argument in -mmcu with the actual chip you are using. Ari S.
  2. AriZuu

    MSP432 RAM retention in LPM3 mode

    I have been playing with other CM0/CM3 (mainly NXP/ST) chips also, each of them seem to have their own peculiarities for deep sleep mode. But I don't remember that none of them had ram retention off by default (well, I cannot recall if other chips have configurable ram retention at all) If TI is going to change the behavior on future chips so that ram retention is enabled it will be perfect (at least on this matter). It would be also very nice if they could add wake-up support to TimerA for example, as currently it looks like there is only WDT and RTC that can periodically wake up the chip.
  3. AriZuu

    MSP432 RAM retention in LPM3 mode

    So I'll keep MAP_SysCtl_enableSRAMBankRetention call in my startup and be happy with it :-) That makes LPM3 in MSP432 vs. MSP430 a little bit different to enter. On 430, there is really nothing special in entering LPM3 mode, at least on those chips I have been playing with. Ram contens is automatically kept by default. On 432, one must really enable ram retention before trying to use LPM3. I hope TI will make this clearer in documentation. Ari S.
  4. Hi, I have been trying to run my Pico]OS port (a simple RTOS) on MSP432. Everything is mostly working nicely, but I got into problems when trying to enter LPM3 mode. After digging into this I suspect that RAM contents is lost when LPM3 mode is entered, which causes my system to crash. If I add call to MAP_SysCtl_enableSRAMBankRetention(SYSCTL_SRAM_BANK7) into my startup things seem to work. However, the msp432 user guide SYSCTL documentation says in table 4-13 "SYS_SRAM_BANKRET register description" that on reset all BNKx_RET bits should be set to 1, ie. all banks should be kept. I'm wondering if I have understood something wrong or is the documentation incorrect ? If I look at driverlib "wdt_a_interval_mode" example, there seems to be a call for MAP_SysCtl_enableSRAMBankRetention also, which suggests that it would really be necessary. Startup code (along with pico]os stuff) is at https://github.com/AriZuu/blink-test/blob/master/msp432/startup.cif someone is interested. Ari S.
×