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Everything posted by veryalive

  1. Hi, and a great example of tight code. But ...... How is this pre-emptive? Why do I see this as round robin? What am I missing? Thanks and cheers.
  2. Many thanks. I'll PM you my details. At the moment, I have some connectivity issues with the forum PM service; so I'm replying to you via this forum. Cheers,
  3. @@Fmilburn It is very kind of you to offer your board to the community. Bravo. If there is a spare one, may I request it? I have both an AD9850 and a 6989 LP in my lab. If you are OK with this, I can give you some more details via PM.... Cheers.
  4. ------ sorry about this post (just above) ---- i just updated my page and saw the problem was solved ! congratulations!
  5. yes, i noticed this in the original post ..... Also, when I make int ledPin equal to either P1_0 or P1_6 the corresponding LED on the launchpad blinks as the code states. so, the conclusion is that at least some port pins are working. could the poster please confirm that GREEN and RED LEDs blink? if so, that's a good sign, but more work on testing those two ports is required. maybe using direct port mnemonics in energia: a---- Energia, all bits toggle on 2 ports of the 2553. then LED or voltmeter test each pin. ==== setup: { P2SEL |= 0xC0; // P2_6 and 7 to IO mode P2DIR = 0xFF; P2OUT = 0xFF; // P1DIR = 0xFF; P1OUT = 0xFF; } loop: { P1OUT = 0; P2OUT = 0; delay(1000); // longish delay to see the change on a DVM P1OUT = 0xFF; P2OUT = 0xFF; delay(1000); } b--- CCS ==== but the best would be CCS: write the same short loops, then in 'debugger', without even starting the program, just manipulate each PORT bit to 0 or 1 from 'register view', then check each pin with a voltmeter or LED probe.
  6. Hi forum, I have many 5 volt LCDs. Here's an idea for using them on 3.3 volt MSP430 systems, other 3 volt systems and LaunchPads. Let's think of the typical 16 char x 2 row LCD, with a 16 pin connector (pin 1 = GND, pin 2 = Vcc, pin 3 = Vee, etc) and operate the MSP and LCD off only one 3volt source. No extra power supplies. I've been using this technique for a long while, its nothing new, you may have already seen it. PROBLEM STATEMENT - how to use a 5volt LCD unit on a 3.3 volt system without creating a separate 5v supply. SOLUTION SUMMARY - use a simple circuit to create a negative voltage from the MSP 430 ACLK. This negative voltage then drives the LCD Vee on pin 3. The ACLK ***must*** be enabled in your software. You can enable ACLK in either CCS or Energia. Current measurements and waveforms are shown below. Clearly, you have to sacrifice use of the PORT P1_0 (red LED) pin, but this can be a reasonable trade off. If you can't do this, then you can use another MSP output to generate the negative voltage. HARDWARE - a-- create a simple negative voltage charge pump (two capacitors, 2 diodes). - input is from MSP ACLK pin +- 12 KHz. - output is to LCD Vee, which is almost always pin 3. b-- here is a simple charge pump circuit: (please do google this if you've a question, it is really simple) | | || ACLK -->---| |---------O----------||<|------O--------->---- to Vee, pin3 on LCD. | | | || | C1 | D2 | | | === ===== D1 \ / C2 ===== ======= | | | | | | | GROUND GROUND Typical component values are not critical. I used: C1 = C2 = 1 uF. D1 = D2 = Germanium 1N569. Results are below. c-- then connect the LCD module as follows: - pin1 to GROUND - pin2 to +3.3 volts (same line as the MSP430 positive supply) - pin3 to the charge pump inverter circuit, above in para 'b'. - all the other pins (RS R/W E DATA0-7) to PORT pins suitable for your application. d-- the scope output of the waveform in actual operation is shown in the scope screen shot below. SOFTWARE - you must enable the ACLK / VLO to be output from the MSP430: P2SEL |= 0x07; // aclk P2_0 pin8. smclk P2_1 pin9. ta0 3 P2DIR |= 0x07; BCSCTL3 = LFXT1S_2; // aclk = vloclk abt 12khz This can be done in CCS or in Energia 'SETUP'. CURRENT CONSUMPTION - .... With this configuration: - MSP430F2272 at 1MHz, PORTs 1,3,4 all set to OUTPUT LOW. PORT 2 set up as above. 4 x 20 LCD with blue backlight (powered by 3.3volts to a reasonable back light output) .... here is the typical current consumption I measured: - MSP430F2272 running tight loop, 1MHz 1.1 mA - loop + charge pump 1.55 mA <<<< so, only 0.45 mA for the charge pump - loop + charge pump + LCD backlight 9.44 mA (these are high efficiency blue LEDs) PLUS POINTS - - only one power supply needed for a simple 430 + LCD project. - rather low current consumption - even lower current consumption by switching ACLK off (but then you should turn off the LCD Vcc +3.3 - use another PORT pin as the LCD Vcc) MINUS POINTS - - you have to use a MSP430 port pin ALTERNATIVES - - use a timer / int driven PORT pin to replace the ACLK. - LCD too much contrast? : - insert series resistor to LCD Vee from charge pump to reduce neg volts - LCD not enough contrast? : - use a negative voltage triple / quadrupler. Hope someone can use this idea..... Cheers.
  7. @@energia. Thanks for your reply. 1.... Download size. Thanks for confirming ti.rtos as the base for 432 e17 sketches, with the task loaded afterwards. I sort of figured this out, and have visited Rei Vilo's pages. . . I'm more used to traditional rtos environments (create, semophore, wait, etc, etc), so I've not yet thrown myself at the 432mt. But would have to understand how to do that 'multi-tab' in CCS, as that's my only way to load a LP with E17 code for now. 2.... I'll try that cloud procedure you mentioned in your previous post, but it'll take some days before I get to it. BTW. Gosh, stellaris on e17 compiles and loads fast! Thanks, cheers,
  8. veryalive

    Ultra Low Power

    @@sven222 Hi again, In fact, I did notice that the ports were initialized in your code. In the spirit of helping you avoid some strange stuff I found out myself, here is a better explanation... The main point is that, AFTER RESET - P2SEL initial value is indeed 0xC0. See the 0x00 Family guide slau144, page 333, chapter 8.3, table 8.2. These must be changed to '00' for normal port IO. The default is so that the 2553 comes up working OK if a 32KHz xtal is installed. This means that even if you write to P2DIR and P2OUT, they will not do anything to P2.6 and P2.7 output port IO bits. This will do something else ! From the 2553 data sheet, Port schematics, pages 53 + ..... For P2DIR BIT6 set - P2.6 will become Timer0_A3 TA1. (assuming that P2SEL 6 is still at '1' ) And P2.7 will be XOUT. Just so you are aware..... tcheuss,
  9. veryalive

    Ultra Low Power

    @@sven222 Just coming back to your original request on 'lowest power possible'. You may want to be aware of setting Port 2 bits 6 and 7 to bit IO mode. After reset, they are set for supporting the 32KHz xtal. You can refer to the MSP430x2xx family guide, and the 2553 datasheet (Port IO page 53 ++) for the details. So, in your start up, execute this code: P2SEL = BIT7 + BIT6; // put bits 6 and 7 in IO mode. 2553 pins 18 and 19. This assumes: - you're using a 2553, probably on a LaunchPad (I ssume this as you mention only P1 and P2) - you are not using Energia (IDE as you described above) Cheers,
  10. Hello @@energia Thanks for your patience; I had to get up to speed on : -- CCS cloud -- Energia projects in desktop CCS -- a few other things I've tried several things and here are the results, as far as I can see. PROBLEM RECAP Up till 25 Jan 2016 ======================================= I am not able to load E17 sketches into the 432LP. I get a 'DSLite.exe error message' when I attempt a load to LP. On the other hand, I can get full load / debug control of my 432LP from the CCSv6.1.1 desktop with straight C programs. GOOD NEWS ! SUMMARY to Friday 29 Jan 2016 ============================================ I am indeed able to compile and download the 'blink.ino' sketch into the 432LP, but only when working as follows: - using CCSv6 desktop - creating a new Energia project in CCS6: copy / paste 'blink.ino' - CCS build (hammer icon) / debug (bug icon) And this downloaded 'blink' into the 432LP. NOTES: - I got compile errors during CCS build of 'blink'. No line numbers were indicated (red spot on right) - ignoring the CCS build compile errors, I launched a debug session. My 432LP red LED now blinks. >>> I find this quite surprising <<< TRIED / RESULT ============== Chronologically: 1 -- ran CCS cloud -- selected 432LP, loaded 'blink', ran it -- loaded / ran 'ticloudagent__2__xds110_drivers.exe' as requested by CCS cloud (I am not convinced this loaded properly) -- again, ran 'blink' in CCS cloud / Energia, appeared to compile OK, waited forever to download, no 'crash' messages. RESULT : not working. My PC hung on what I think was the download. ====== 2 -- basically repeated step 1 in different flavours. RESULT : as above. ====== 3 -- GOOD NEWS - Loaded Energia sketch into 432LP while running under CCSv6 -- I figured this was a good idea since CCS desktop loads into the 432LP every time, using its DS server version. (in spite of a DSLite.exe file in CCS directories (as I reported), I cannot confirm what module is loading the LP) -- I created a new CCSv6 desktop project, Energia type. -- copy / paste the 'blink' sketch -- CCS 'build' (hammer icon) -> this got some error reports in the console window, but no 'red dots' in the text. -- CCS 'debug' the sketch, the download reported OK in CCS console, hitting 'resume' (|>) got the RED LED blinking. See Addenda 1, below. NEXT STEPS ========== - try a few more, but more complicated, Energia sketches under CCSv6 - try the CCS debug features on an Energia sketch under CCSv6 CONCLUSIONS =========== 1 -- My personal workaround for this problem is to use CCSv6 desktop for Energia projects. In addition to using CCSv6 for my straight-C projects. 2 -- I still think there is something, likely pretty simple, lurking in DSLite.exe while running E17 standalone. I see some concerns on e2e and this forum on loading 432LPs. 3 -- I hope that the CCSv6 destop version maintains its 432LP and other Launchpad loaders intact as it works for me! Well, that's it for now, and I hope this helps. Have a good weekend ! ------------------------------------------------------------------------------------------------------------- ADDENDA: ======== 1-- CCS6 CONSOLE OUTPUT DURING 432LP LOAD ========================================== Here's the CCS6 console output related to the loading of 'blink' into 432LP: CORTEX_M4_0: GEL Output: Memory Map Initialization Complete CORTEX_M4_0: GEL Output: Halting Watchdog Timer CORTEX_M4_0: Flash Programmer: Erasing main memory CORTEX_M4_0: Flash Programmer: Writing 26116 bytes to flash memory 0x00000000 CORTEX_M4_0: Flash Programmer: Writing 2884 bytes to flash memory 0x00006604 CORTEX_M4_0: Flash Programmer: Writing 8 bytes to flash memory 0x00007148 I am amazed why 26116 bytes was loaded to flash at location zero. (BTW - 26116 dec = 0x6604 hex) I guess that the 2884 bytes loaded at 0x6604 is the 'blink'? (BTW - right after the previous 26KB) 2-- my version of ticloudagent__2__xds110_drivers.exe ===================================================== .... ver 0.5 size 12,886,056 bbytes
  11. @@energia Apologies for going quiet for a few days. This is coming back to the problem of uploading E17 sketches to an MSP432 LP. >>>> Here's something that makes me question if this problem is purely Vista related. Could we keep this issue active based on the following ? ..... Observation: While using the 432LP on CCS6.1, something obvious occurred to me --- that I'm able to load code into the 432 LP each and every time. And I recalled somewhere that TI would be going towards DSLite in future. So, perhaps CCS6.1 is indeed using DSLite.exe routinely, and it can upload into the 432 LP. And, I confirmed that DSLite exists in the CCS6.1 folders And another version is located in the E17 folders. 1--- DSLite.exe in CCS6 PATH C:\ti\msp430\MSPWare_2_20_00_19\examples\boards\MSP-EXP432P401R\MSP-EXP432P401R_Software_Examples\Firmware\Binary\DSLite\DebugServer\bin Properties: size 710,656. Version (?) 3june or 15may2015 2--- DSLite.exe in Energia17 path --- you know.... Properties: size 107,520. Version (?) 7jan 16 or 15nov2015 (under the product name Code Composer Studio) So, here is the naive question: Could it be that the 'old, big version' of DSLite.exe in CCS6.1 is correctly loading MSP432 LaunchPad flash memory? Whereas, not in the E17 ? Thoughts? Cheers,,,,,,,,,,
  12. veryalive


    @@Fmilburn..... A very interesting writeup, thanks. What a coincidence; I am working with the AD9850 DDS module this week ! Although your writeup is on FFTs done on ARM MSPs in the KHz range, here are some data and thoughts on the AD9850 DDS I captured which you, or others, may find useful. Note that the DDS frequency range here is 7.0 MHz. For instance, DDS spurs are not big at KHz, but being aware of them (as I'm sure you are!) is handy -- see 1 C below. This info may be useful to folks embedding DDS into radio / signal processing devices and is part of an investigation I'm doing around : -- DDS - AD9850 module and breadboarded cousins: AD5930 (sweep); AD5933 (impedance); AD9834c (DDS); AD9835 (DDS). -- 'clock generator' Si5351 - a rather interesting, tiny device with 3 high frequency outputs and an I2C interface. -- analog PLL - own designs. 1- Spectral performance of AD9850 sine wave. Attached is a screenshot of the close-in spectrum output of the AD9850 as measured on a high-end-hobbyist SDR (software defined radio). Although the sinusoid AD9850 on a scope can look nice, a spectrum analyser can show us a bit more. Some notes.... a) The SDR is tuned to 7,000,000 Hertz with resolution bandwidth at 0.5 Hz, so two spectral lines are 1.0 Hertz. (yes, RBW = 0.5 Hz !) The DDS output has been trimmed (see 2a, below) and is seen to be about 1 Hz lower. The SDR frequency readout had been previously trimmed against a time-and-frequency standard long wave transmitter. B The fundamental DDS output at 7.0 MHz is at -60 dBm. Vertical divisoins are 10dBm. c) Spurs (spurious) frequencies are seen at +- 100 Hz consistently around 7.0 MHz. These are -90 dBm, only 30dB down from the fundamental - rather strong, but can be typical for such a DDS setup. The other two spurs come and go at other DDS fundamentals. (DDS spurs are complex, BUT - Analog Devices has a nice spur calculator with graphics of the step-waveform and the resulting spectrum) 2- MSP430/432 code size reduction. Integer arithmetic. Using integer arithmetic to generate the AD9850 frequency word. I also started with floating point. For the 2553, the flash saved is important. This line of code worked on both the 2553 and 432 in CCS: (not tested for overflows across all input to this function call). void sendFrequency(unsigned long frequency) { int b; P4OUT &= ~DATA; // use DATA line to time the following calculation P4OUT |= DATA; unsigned long freq_32val = ((frequency * 4294967296) / 125001340) ; // nominal 125000000 xtal P4OUT &= ~DATA; Some things to note: a) - the DDS clock divisor is 125,001,340 MHz instead of the nominal 125MHz. This was determined empirically and is important for accuracy. This offset from nominal will be measured periodically with respect to temperature and stored in a 2553 Flash Info Segment. SW trim. B - code size : On a 2553 in CCS6.1, this calculation, setups and a few blinking LEDs was around 2.2 K bytes c) - execution time : the same setup as in B , with the 2553 set to the calibrated 1 MHz clock. The DATA line was raised during the routine's execution ... Time = about 13 mSec, I recall. 3- Environment - coded for MSP430G2553 LP (Energia17 and CCS6.1) and MSP432 LP (CCS6.1) - SDR receiver and spectrum analysis on 'Perseus SDR' - signal coupling from the AD9850 to the SDR was through the air - about 50 cm distance. The SDR was connected to a short outdoor antenna, so the (quiet) background level of about -110dBm is local airwaves. None of this is particularly new, but I hope someone will find this writeup of use. This is intended for learning, possibly make a small, battery powered signal generator for my workbench. As such, next steps are: - test other devices (esp Si5351) - LCD freq display - UART interface - rotary encoder freq knob - attenuator - etc .............. all driven by the MSP430/2 Cheers,
  13. Hi, and welcome, There's a company called Elpotronic with a lite / free version of their up / down loader. Since you've used Energia, you are likely using a Launchpad, so Elpotronic should work. BUT - I've never used hexfiles before, so, Im afraid I won't be able to help you in those details. https://www.elprotronic.com/productdata;jsessionid=8C6E08AE222C9B84C30930264439B3E8 FET-Pro-430 Software Pkg. - LITE Installation package for FET-Pro-430, includes GUI, and supporting material. Lite Version. Version 3.40 (27.Nov.2015) Hope this helps !!!
  14. ...... and the screenshot of the Blink example upload to the 432LP from E17 with 'verbose' enabled 'during upload' checked in file > properties. I guess the white test at the bottom of the Energia window is what you were looking for from 'verbose mode'. (does it make sense that the bottom right corner of the E17 window says the 432LP is connected on Com2 ? the UARTs in my PC enumerated to 37 and 38. Just a thought)
  15. @@energia I'm please to help! For the first step, I ran DSLite from the DOS prompt and got the same error message immediately I hope I did the right thing. Then I took a screen shot of the following (left to right): - DOS window - error message - partial view of the folder within E17 - the DSLite.exe file properties (date / size / etc). I hope the screen shot comes through in this message on this forum, if not, I'll ttry again. NEXT STEP - I'll do what you requested on 'verbose' mode, running 'blink' uploade from E17 to the 432LP. cheers,
  16. Many thanks, @@energia. I do get that DSLite error message box prior to the upload errors that other folks have reported here in 43oh (previous threads on 'E17 Upload probs'). All the best, and hoping a workaround is forthcoming.
  17. @@energia @@dubnet OK -- here's what I tried, a few times. >>>> However, as before, I still cannot upload the 'blink' sketch to the 432LP. <<<< 1- I used the latest version of drivers that Rob indicated. In fact, I used them earlier today, the same file. xds_drivers Folder size = 12,118,732 bytes after unzip. 2- I created a new CCSv6.1.1 project for the 432LP. Again, just a blink; and it compiled / uploaded & is debuggable via CCS. Then I properly terminated that CCS session, exited CCS. 3- I then went back to Energia17 and selected the 'blink' example as before, and selected UPLOAD. >>> The DSLite error message occurs again. This time, I copied the full error message, apologies that its not in English, but I hope you'll get the gist of it. DSLITE ERROR MESSAGE..... === Probleemhandtekening: Gebeurtenisnaam van probleem: APPCRASH Naam van de toepassing: DSLite.exe Versie van toepassing: Tijdstempel van toepassing: 56498526 Naam van foutmodule: api-ms-win-core-string-l1-1-0.d Versie van foutmodule: 6.0.6002.19514 Tijdstempel van foutmodule: 561e7b93 Uitzonderingscode: c0000142 Uitzonderingsmarge: 00009f55 Versie van besturingssysteem: 6.0.6002. Landinstelling-id: 4105 Aanvullende informatie 1: 9d13 Aanvullende informatie 2: 1abee00edb3fc1158f9ad6f44f0f6be8 Aanvullende informatie 3: 9d13 Aanvullende informatie 4: 1abee00edb3fc1158f9ad6f44f0f6be8 Lees onze privacyverklaring: http://go.microsoft.com/fwlink/?linkid=50163&clcid=0x0413 === I'm still on this, so if there are any updates, I'd be very pleased to try them. In the meanwhile, I'll dig into Forum threads I've seen which talk to this very 'upload situation' to see if I've missed something. Thanks up till now !!! Cheers,
  18. @@dubnet @@energia Thanks for the tips, I'll dig in. (BTW - This is why I love this forum) Cheers.
  19. @@dubnet Many thanks !!! Your advice worked. Completely disabling Vista UAC User Access Controls) allowed the 2 MSP432 LP UART drivers to be properly loaded. I confirmed this by jumpering the emulator-side RX/TX header pins on the 432LP while sending a message to the enumerated COM port called 'XDS110 Class Application/User UART'. NOW , the next challenge ..... Getting Energia 17 to talk to the MSP432 LP wihout *a* Compile errors *b* DSLite error Although I suspect one general Windows file system problem on my side, I just can't isolate and correct it. The screenshots for these two errors on my 432LP are in the first post of this thread. ---- > Is there anybody out there with some advice, please ? < ---- Thanks and cheers,
  20. As an idea, you could check the errata PDF for the MSP432, it accompanies the data sheet. Specifically, there's a few silicon bugs related to the REF module; this drives the ADC at 1.2, 1.45, 2.5, Vcc and Vss. I had some issues related to Vref selection and external output to pin P5.6 which were finally resolved by sequencing the ADC register bits appropriately to work around the bugs. This I did in CCS6, not Energia. Although I didn't experience your situation, perhaps this can help you.
  21. Thanks for this idea. I will check about User Account Control. Cheers,
  22. Hi Forum, I just started with MSP 432 on both Energia 17 and CCS6, and I'm having some issues. I've worked them as far as I can, and they seem to break down as below. I've used Energia for some years - a great tool. I use CCS a lot. I've been able to sort out 99% of MSP430 / Stellaris issues by myself, but now, I'm reaching out for some help to some wiser folks than I. I've checked this forum and TI e2e. Please help -- How to get my MSP432 LP application UARTs to appear correctly. -- How to get MSP432 Energia sketches to compile correctly. Thanks folks !!!! Here's the situation..... 1. Application UARTs on 432 The first problem is that Windows device manager reports 2 (two) XDS110 devices in error. I cannot resolve this error by using the latest drivers /DSPinst.exe / DSLite / etc. As a result, there are no application UARTs available. But, CCSv6 allows me to upload compiled code, and to debug the MSP432 LP. ATTACHMENT : screenshot of 'MSP432 - applic uart drivers in error'. The message, not in English, says the file, folder, or volume name is incorrect. I've got Energia in C:\ 2. Compiling sketches for the MSP432 Now, turning to Energia v 17, here's what happens. (BTW, same on E v 16). a) if I VERIFY the basic 'Blink' sketch, I get a massive number of errors. Attachment: screenshot of 'MSP432 e17 blink w errors' If I try to UPLOAD the basic 'Blink' sketch, the same errors of course, but with a DSLite error message. Attachment: screenshot of 'MSP432 e17 blink w errors and DSLite error' c) just for the record, I sucessfully compiled a MSP430G2553 Blink sketch Attachment: screenshot of 'MSP430g2553 e17 blink w NO errors' d) and lastly, I'm able to complie / download / debug the MSP432 LP via CCSv6 (but no application UARTs) Some things I've done: - removed / reinstalled Energias 16 / 17. Now using 17. - undated CCSv6 to the latest - ensured Java is up to date - run various versions of the drivers for the MSP432 LP XDS110 driver installs. Then always getting the same errors / no UARTs as reported by Device Manager. CONFIG NOTES: 1. my overall system setup: MSP432 LP rev1.0. MSP430 LPs: G2553 / F5529 / F 6989 / LM4F Stellaris 2. Energia17 in C: No spaces or long file name. 3. laptop with Windows Vista
  23. Although you haven't given lots of detail, one thing you might investigate is direct DMA transfer from the ADC to UART. MSP430 DMA includes peripheral to peripheral, as the peripherals have memory addresses. Just an idea which I have not personally tried.
  24. i have the same / similar problem with my 432 LP received last week. PLEASE READ 'However...", below...... EXCEPT : >>> - windows reports that the drivers were installed and that two 'XDS etc ' are ready to use <<< - there are yellow exclamation marks, as you describe, in device manager against two XDS - Energia 16 - same reaction as you've described. HOWEVER... ========== When I run the 432 'CCS blink' program on CCS v6.1, the program compiles / loads / debugs (including breakpoints)... .... all while widows still reports two (2) yellow exclamation points on the 2 XDS110 .... Conditions: ========= (vista / 32bit) ( silkscreen on the Launchpad PCB : MSP--- rev 1.0 / xds110-et rev 1.0) (JTAG switch S101 'left' on XDS-ET) (the 432 LP 'out of box'with the blinking LEDs works OK. ) //***************************************************************************** // // MSP432 main.c template - P1.0 port toggle // //**************************************************************************** #include "msp.h" void main(void) { volatile uint32_t i; WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer // The following code toggles P1.0 port P1DIR |= BIT0; // Configure P1.0 as output while(1) { P1OUT ^= BIT0; // Toggle P1.0 for(i=10000; i>0; i--); // Delay } } I'm still investiging why this happens and how to fix it. In the meanwhile - anybody have some other ideas ? Cheers.
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