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majeddotcom

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  1. Like
    majeddotcom reacted to jpnorair in MSP430 as a RFID Reader processor   
    Send me a private message through the forum.
  2. Like
    majeddotcom reacted to roadrunner84 in minimum capture time in msp430   
    As the ADC works, first an input is sampled in the sample and hold circuit (S&H), this is basically a capacitor mimicing the external voltage.
    After the sample is held it is approximated by the converter part (SAR and SD being the most popular; successive approximation and sigma delta. This describes the way the digital  value for that voltage is determined).
    A minimum sample time probably signifies the minimum amount of time the S&H needs to sample the output. After that the conversion still needs to be done. So just the minimum capture time probably is by far not as good as the maximum sampling frequency.
    Sorry, my bad.
    The capture time is refering the the capture property of the timer. It states that TA,CAPmin = 20ns. This means that when a capture event occurs, the CCA pin needs at least 20ns to sample the input signal. So after the event, if the input changes within 20ns, you have uncertainty.
    There is also stated that the timer clock is typically the system clock, which is at most 62.5 ns. Since the timer cannot work if it has only one count value (CCR0 = 0) you need at least two count values, the highest speed at which the capture event could take place is thus 125ns.
    Then you still need to do something with these values, and since empty interrupts take at least 11 cycles to complete, I can say with fair certainty that you cannot process captures values at a speed faster than 20 clockcycles, so no faster than 1.25us. For any real application probably even slower.
  3. Like
    majeddotcom reacted to jazz in Logic Analyzer/Data Logger   
    For any kind of measuring device, based on uC, my golden rule is...
    1. uC pickup the samples at highest possible speed, and store it in internal RAM.
    2. After all samples are collected, send it over USB (hi speed) to PC.
    3. Do all calculation on PC side, and display results in graphical form to user.
     
    If device need to be logic analyzer, all job for uC will be copying input from the port to internal RAM (at highest possible speed), and at the end send complete RAM over USB to PC. This is job for MSP430F5xx familly.
     
    My user interface on PC side:
     

     

  4. Like
    majeddotcom reacted to V0JT4 in Universal Ripple Control Receiver   
    I'm not sure how functional it may be without interrupts as its written to depend on them and as is described in MSP430 2xxx User's Guide. You would need to check some ready/busy flags of USCI_B module.
     
    However if you get to tx function you can verify functionality:
    Run upto tx count=0
    Reset
    Run to rx count=0 and examine the memory in debug mode
    rxdata buffer should contain same data as txdata
     
    You can also test Anderson's code for I2C USCI, it is for 16bit addressing.
  5. Like
    majeddotcom reacted to V0JT4 in Universal Ripple Control Receiver   
    First thing that pops my mind is to set 16bit addressing bit because your EEPROM chip uses it.

    replace i2c_rx(11, 0xA0, rxdata, 0, 0); with i2c_rx(11, 0xA0, rxdata, 1, 0);
    In test example I was using small EEPROM that uses only 8bit addressing, STMicro 24C16. I think all devices up to 256B and some up to 2KB (from outside they behave like 8 I2C devices in one pack) use it. In final design I used 64KB chip that requires 16bit addressing.
     
    You may also check if WP, A0, A1 and A2 are connected to GND. Another option is to place break point into I2C status interrupt that is hit when slave sends NACK or does not respond at all. Best way is to have scope or logic analyzer to see the waveform. You can watch transaction progress if you place break point at the beginning of "u8 i2c_int(void)" in i2c.c.
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