I'm toying with using an msp430 as an in-line protocol converter between a couple of busses, and am trying to confirm if it's even viable.
As a simple test, I'm using the code below to pass signals from inputs (P1.6, P1.7) to outputs (P1.4, P1.5) and it seems capable of relaying signal features down to a size of ~2.5us. Unfortunately, that's not fast enough for what I want - I need to handle features down to 0.5us or so.
Assuming I'm running MCLK at 16MHz, this means I'm needing ~40 clocks just to copy an input GPIO to an output GPIO with some trivial bit manipulation - I'm not sure if this is expected, or if I'm just not clocking the device correctly. Given what I'm doing in the loop I'd expect only ~10 clocks or so. From my reading of the SLAU144 Basic Clock Module chapter I think I'm running it as fast as I can, but aren't really sure how to confirm that. I believe I'm setting RSELx and DCOx to their maximum values, and MCLK to DCO with a divider of 1, but is this the right way to force the fastest MCLK possible?
WDTCTL = WDTPW + WDTHOLD; // stop watchdog
BCSCTL1 = RSEL0|RSEL1|RSEL2|RSEL3; // RSELx = 0xF = AS FAST AS POSSIBLE
DCOCTL = DCO0|DCO1|DCO2; // DCOx = 0x7 = AS FAST AS POSSIBLE
BCSCTL2 |= SELM_0 + DIVM_0; // MCLK = DCO, divider = 1
P1DIR |= 0x30; // P1.4 and P1.5 are output
P1DIR &= ~0xC0; // P1.6 and P1.7 are input
register unsigned char a, b;
a = P1OUT; // current output values
a &= ~0x30; // zero P1.4, P1.5
b = P1IN; // current input values
b &= 0xC0; // zero all but P1.6, P1.7
P1OUT = a | (b >> 2);