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Rickta59

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  1. Like
    Rickta59 got a reaction from Fmilburn in MSP430 Wearable with Radio   
    What about using those esp8266 modules with the arduino core?
  2. Like
    Rickta59 reacted to chicken in How to prevent and detect stack overflow   
    Here's a great webinar on the topic of stack overflow from basics like stack sizing all the way to stack usage estimation and analysis, stack monitoring and stack overflow handling.
     
    Recording:
    Transcript: http://barrgroup.com/Embedded-Systems/How-To/Prevent-Detect-Stack-Overflow
     
    Found via the Embedded Muse newsletter.
     
     
     
     
  3. Like
    Rickta59 reacted to jp430bb in 4-wire JTAG with mspdebug and Raspberry Pi GPIO   
    Having a small collection of older F1xx and F4xx MSP430 devices, I've been looking for a convenient way to flash and debug them.  The devices I have don't support Spy By Wire, so they require 4-wire JTAG.  They also have their JTAG pins shared with other functions, so the test and reset pins have to be used to put them into JTAG mode.  
     
    While I do have an Olimex parallel-port JTAG adapter, the computer I use most of the time has no parallel port.  
     
    A Raspberry Pi running Debian Jessie and mspdebug with its gpio driver looked like a good option.  Adding a patch to mspdebug so that the gpio driver supports the reset and test pins got it working.  
     
    The patch is here: https://github.com/johnp789/mspdebug/tree/gpiojtag
     
    Now, I only need a Raspberry Pi Zero, Debian Jessie with the USB ethernet gadget configured on a micro SD card, a USB cable, and 7 jumper wires to flash and debug 4-wire JTAG MSP430 devices.  The Pi Zero might be the lowest-cost 4-wire MSP430 JTAG debugger available!  
    $ sudo ./mspdebug -j -d "tdi=3 tdo=2 tms=4 tck=17 rst=22 tst=27" gpio MSPDebug version 0.24 - debugging tool for MSP430 MCUs Copyright (C) 2009-2016 Daniel Beer <dlbeer@gmail.com> This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. Chip info database from MSP430.dll v3.3.1.4 Copyright (C) 2013 TI, Inc. gpio tms= 4 gpio tdi= 3 gpio tdo= 2 gpio tck= 17 gpio rst= 22 gpio tst= 27 Starting JTAG JTAG_power on JTAG_connct led green JTAG ID: 0x89 Chip ID data: ver_id: 49f4 ver_sub_id: 0000 revision: 01 fab: 40 self: 0000 config: 00 Device: MSP430F44x Available commands: ! fill power setwatch_r = gdb prog setwatch_w alias help read simio blow_jtag_fuse hexout regs step break isearch reset sym blow_jtag_fuse hexout regs step break isearch reset sym cgraph load run verify delbreak load_raw save_raw verify_raw dis md set erase mw setbreak exit opt setwatch Available options: color gdb_default_port enable_bsl_access gdb_loop enable_fuse_blow gdbc_xfer_size enable_locked_flash_access iradix fet_block_size quiet Type "help <topic>" for more information. Use the "opt" command ("help opt") to set options. Press Ctrl+D to quit. (mspdebug) prog fet440_1.c.hex led green Erasing... led red led red Programming... Writing 74 bytes at 1100... led red led red Writing 32 bytes at ffe0... led red led red Done, 106 bytes total (mspdebug)
  4. Like
    Rickta59 reacted to jpnorair in CC13xx Application Integration Survey   
    Hey folks:
     
    I've been working on CC13xx for some time now, porting OpenTag and various other new stuff to it.  I'm not using TI-RTOS -- too clunky.  As usual (for those who know me), I've pushed the RF to the limit and it is shaping up to be a formidable LPWAN/LAN option.
     
    Anyway, I'm trying to decide how I want to enable 3rd party applications.  NuttX is one option, but someone (or I) will need to port that, too.  Energia/MT might be another option -- we'll still need to port that.  I'd be happy to take any information on this topic.  What would be best?
     
    1. Network processor with another MCU for application FW
    2. NuttX
    3. Energia-MT
    4. Something else
  5. Like
    Rickta59 got a reaction from Frida in Basic MSP430 GPIO Macros   
    Do you really know what I'm doing there?  I don't think so. I'm setting P1.4 as output and turning on the SEL bit for it also.  When those two registers are activated, it outputs the SMCLK on the P1.4 pin.  How is that obvious?
     
    more obvious would be a function called:
    __attribute__((always_inline)) static void CPU_output_SMCLK() { P1DIR |= BIT4; P1SEL |= BIT4; } Oh yeah and that PORT/PIN/SEL setting combination is only for the msp430g2553, other chips output the clock on different ports and pins. How is just using the bare registers more readable?
     
    -rick
  6. Like
    Rickta59 got a reaction from curtis63 in Energia hangs on Wire.endTransmission()   
    did you try it without the Wire.write(1) ?  Maybe some i2c device sees that and is waiting for more?
  7. Like
    Rickta59 got a reaction from yyrkoon in Basic MSP430 GPIO Macros   
    BTW:  that macro is missing parens around the ~pin ... should be ~(pin)
  8. Like
    Rickta59 got a reaction from Fmilburn in Basic MSP430 GPIO Macros   
    These all seem to generate the same sized code ... 
    #include <msp430.h> #include <stdint.h> // MSP430 gpio macros #define GPIO_SEL(port) P ## port ## SEL #define GPIO_DIR(port) P ## port ## DIR #define GPIO_OUT(port) P ## port ## OUT #define GPIO_IN(port) P ## port ## IN #define GPIO_IS_INPUT(port,pin) { GPIO_SEL(port) &= ~(pin); GPIO_DIR(port) &= ~(pin); } #define GPIO_IS_OUTPUT(port,pin) { GPIO_SEL(port) &= ~(pin); GPIO_DIR(port) |= (pin); } #define GPIO_IS_PERIPHERAL_IN(port,pin) { GPIO_SEL(port) |= (pin); GPIO_DIR(port) &= ~(pin); } #define GPIO_IS_PERIPHERAL_OUT(port,pin) { GPIO_SEL(port) |= pin; GPIO_DIR(port) |= (pin); } #define GPIO_SET(port,pin) { GPIO_OUT(port) |= (pin); } #define GPIO_CLEAR(port,pin) { GPIO_OUT(port) &= ~(pin); } #define GPIO_READ(port,pin) ( GPIO_IN(port) & (pin) ) #define GPIO_PIN(pin) (1 << (pin)) __attribute__((always_inline)) static inline gpio_is_output(const unsigned port, const unsigned pinno) { switch(port) { case 1: P1SEL &= ~(1 << pinno); P1DIR |= 1 << pinno; break; case 2: P1SEL &= ~(1 << pinno); P1DIR |= 1 << pinno; break; } } //#define USE_MACRO void main(void) { WDTCTL = WDTPW|WDTHOLD; //DCOCTL -= 28; #if defined(USE_MACRO) GPIO_IS_OUTPUT(1,4); GPIO_IS_OUTPUT(1,6); GPIO_IS_OUTPUT(1,0); #elif defined(USE_INLINE_FUNC) gpio_is_output(1,4); gpio_is_output(1,6); gpio_is_output(1,0); #else P1SEL &= ~(BIT4); P1DIR |= BIT4; P1SEL &= ~(BIT6); P1DIR |= BIT6; P1SEL &= ~(BIT0); P1DIR |= BIT0; P1OUT &= ~BIT0; P1OUT |= BIT6; P1SEL |= BIT4; #endif #if defined(USE_MACRO) || defined(USE_INLINE_FUNC) GPIO_CLEAR(1,0); GPIO_SET(1,6); GPIO_SEL(1) |= GPIO_PIN(4); #endif for(;{ P1OUT ^= (BIT0|BIT6); __delay_cycles(1000000>>3); // delay } } At least with msp430-gcc. I didn't try with msp430-elf-gcc
    $ msp430-gcc -Os -g gpio_test.c -mmcu=msp430g2553 -DUSE_INLINE_FUNC; msp430-size a.out; msp430-objdump -CS a.out >/tmp/inline.txt text data bss dec hex filename 180 0 2 182 b6 a.out $ msp430-gcc -Os -g gpio_test.c -mmcu=msp430g2553 -DUSE_MACRO; msp430-size a.out; msp430-objdump -CS a.out >/tmp/macro.txt text data bss dec hex filenameD 180 0 2 182 b6 a.out $ msp430-gcc -Os -g gpio_test.c -mmcu=msp430g2553 ; msp430-size a.out; msp430-objdump -CS a.out >/tmp/reg.txt text data bss dec hex filename 180 0 2 182 b6 a.out
  9. Like
    Rickta59 got a reaction from yyrkoon in Basic MSP430 GPIO Macros   
    I think that is probably a gcc only optimization (forcing always_inline). I'm not sure if you can do that with the ti version.
     
    What I find interesting about discussions like this is that I'm often wrong about what feels true in my gut and what is actually true.  I'm sure I'm hampered by the fact I've been doing 'C' code now since 1982. I have a bag of personal biases that are often wrong with today's more capable compilers.  Lucky for all of you, optimization technology has come a long way since the days of the pdp 11
     
    -rick
  10. Like
    Rickta59 got a reaction from yyrkoon in Basic MSP430 GPIO Macros   
    These all seem to generate the same sized code ... 
    #include <msp430.h> #include <stdint.h> // MSP430 gpio macros #define GPIO_SEL(port) P ## port ## SEL #define GPIO_DIR(port) P ## port ## DIR #define GPIO_OUT(port) P ## port ## OUT #define GPIO_IN(port) P ## port ## IN #define GPIO_IS_INPUT(port,pin) { GPIO_SEL(port) &= ~(pin); GPIO_DIR(port) &= ~(pin); } #define GPIO_IS_OUTPUT(port,pin) { GPIO_SEL(port) &= ~(pin); GPIO_DIR(port) |= (pin); } #define GPIO_IS_PERIPHERAL_IN(port,pin) { GPIO_SEL(port) |= (pin); GPIO_DIR(port) &= ~(pin); } #define GPIO_IS_PERIPHERAL_OUT(port,pin) { GPIO_SEL(port) |= pin; GPIO_DIR(port) |= (pin); } #define GPIO_SET(port,pin) { GPIO_OUT(port) |= (pin); } #define GPIO_CLEAR(port,pin) { GPIO_OUT(port) &= ~(pin); } #define GPIO_READ(port,pin) ( GPIO_IN(port) & (pin) ) #define GPIO_PIN(pin) (1 << (pin)) __attribute__((always_inline)) static inline gpio_is_output(const unsigned port, const unsigned pinno) { switch(port) { case 1: P1SEL &= ~(1 << pinno); P1DIR |= 1 << pinno; break; case 2: P1SEL &= ~(1 << pinno); P1DIR |= 1 << pinno; break; } } //#define USE_MACRO void main(void) { WDTCTL = WDTPW|WDTHOLD; //DCOCTL -= 28; #if defined(USE_MACRO) GPIO_IS_OUTPUT(1,4); GPIO_IS_OUTPUT(1,6); GPIO_IS_OUTPUT(1,0); #elif defined(USE_INLINE_FUNC) gpio_is_output(1,4); gpio_is_output(1,6); gpio_is_output(1,0); #else P1SEL &= ~(BIT4); P1DIR |= BIT4; P1SEL &= ~(BIT6); P1DIR |= BIT6; P1SEL &= ~(BIT0); P1DIR |= BIT0; P1OUT &= ~BIT0; P1OUT |= BIT6; P1SEL |= BIT4; #endif #if defined(USE_MACRO) || defined(USE_INLINE_FUNC) GPIO_CLEAR(1,0); GPIO_SET(1,6); GPIO_SEL(1) |= GPIO_PIN(4); #endif for(;{ P1OUT ^= (BIT0|BIT6); __delay_cycles(1000000>>3); // delay } } At least with msp430-gcc. I didn't try with msp430-elf-gcc
    $ msp430-gcc -Os -g gpio_test.c -mmcu=msp430g2553 -DUSE_INLINE_FUNC; msp430-size a.out; msp430-objdump -CS a.out >/tmp/inline.txt text data bss dec hex filename 180 0 2 182 b6 a.out $ msp430-gcc -Os -g gpio_test.c -mmcu=msp430g2553 -DUSE_MACRO; msp430-size a.out; msp430-objdump -CS a.out >/tmp/macro.txt text data bss dec hex filenameD 180 0 2 182 b6 a.out $ msp430-gcc -Os -g gpio_test.c -mmcu=msp430g2553 ; msp430-size a.out; msp430-objdump -CS a.out >/tmp/reg.txt text data bss dec hex filename 180 0 2 182 b6 a.out
  11. Like
    Rickta59 got a reaction from spirilis in Basic MSP430 GPIO Macros   
    I think that is probably a gcc only optimization (forcing always_inline). I'm not sure if you can do that with the ti version.
     
    What I find interesting about discussions like this is that I'm often wrong about what feels true in my gut and what is actually true.  I'm sure I'm hampered by the fact I've been doing 'C' code now since 1982. I have a bag of personal biases that are often wrong with today's more capable compilers.  Lucky for all of you, optimization technology has come a long way since the days of the pdp 11
     
    -rick
  12. Like
    Rickta59 got a reaction from chicken in Basic MSP430 GPIO Macros   
    BTW:  that macro is missing parens around the ~pin ... should be ~(pin)
  13. Like
    Rickta59 got a reaction from chicken in Basic MSP430 GPIO Macros   
    These all seem to generate the same sized code ... 
    #include <msp430.h> #include <stdint.h> // MSP430 gpio macros #define GPIO_SEL(port) P ## port ## SEL #define GPIO_DIR(port) P ## port ## DIR #define GPIO_OUT(port) P ## port ## OUT #define GPIO_IN(port) P ## port ## IN #define GPIO_IS_INPUT(port,pin) { GPIO_SEL(port) &= ~(pin); GPIO_DIR(port) &= ~(pin); } #define GPIO_IS_OUTPUT(port,pin) { GPIO_SEL(port) &= ~(pin); GPIO_DIR(port) |= (pin); } #define GPIO_IS_PERIPHERAL_IN(port,pin) { GPIO_SEL(port) |= (pin); GPIO_DIR(port) &= ~(pin); } #define GPIO_IS_PERIPHERAL_OUT(port,pin) { GPIO_SEL(port) |= pin; GPIO_DIR(port) |= (pin); } #define GPIO_SET(port,pin) { GPIO_OUT(port) |= (pin); } #define GPIO_CLEAR(port,pin) { GPIO_OUT(port) &= ~(pin); } #define GPIO_READ(port,pin) ( GPIO_IN(port) & (pin) ) #define GPIO_PIN(pin) (1 << (pin)) __attribute__((always_inline)) static inline gpio_is_output(const unsigned port, const unsigned pinno) { switch(port) { case 1: P1SEL &= ~(1 << pinno); P1DIR |= 1 << pinno; break; case 2: P1SEL &= ~(1 << pinno); P1DIR |= 1 << pinno; break; } } //#define USE_MACRO void main(void) { WDTCTL = WDTPW|WDTHOLD; //DCOCTL -= 28; #if defined(USE_MACRO) GPIO_IS_OUTPUT(1,4); GPIO_IS_OUTPUT(1,6); GPIO_IS_OUTPUT(1,0); #elif defined(USE_INLINE_FUNC) gpio_is_output(1,4); gpio_is_output(1,6); gpio_is_output(1,0); #else P1SEL &= ~(BIT4); P1DIR |= BIT4; P1SEL &= ~(BIT6); P1DIR |= BIT6; P1SEL &= ~(BIT0); P1DIR |= BIT0; P1OUT &= ~BIT0; P1OUT |= BIT6; P1SEL |= BIT4; #endif #if defined(USE_MACRO) || defined(USE_INLINE_FUNC) GPIO_CLEAR(1,0); GPIO_SET(1,6); GPIO_SEL(1) |= GPIO_PIN(4); #endif for(;{ P1OUT ^= (BIT0|BIT6); __delay_cycles(1000000>>3); // delay } } At least with msp430-gcc. I didn't try with msp430-elf-gcc
    $ msp430-gcc -Os -g gpio_test.c -mmcu=msp430g2553 -DUSE_INLINE_FUNC; msp430-size a.out; msp430-objdump -CS a.out >/tmp/inline.txt text data bss dec hex filename 180 0 2 182 b6 a.out $ msp430-gcc -Os -g gpio_test.c -mmcu=msp430g2553 -DUSE_MACRO; msp430-size a.out; msp430-objdump -CS a.out >/tmp/macro.txt text data bss dec hex filenameD 180 0 2 182 b6 a.out $ msp430-gcc -Os -g gpio_test.c -mmcu=msp430g2553 ; msp430-size a.out; msp430-objdump -CS a.out >/tmp/reg.txt text data bss dec hex filename 180 0 2 182 b6 a.out
  14. Like
    Rickta59 reacted to Fmilburn in DriverLib Examples for the MSP430F5529   
    Energia and Arduino users eventually get to the point where they need more direct access to the hardware if they take on more complicated projects.  In addition to the direct access of registers using the provided header files, TI offers DriverLib which contains abstractions for accessing the peripherals.
     
    To better understand the peripherals, and to check out DriverLib, I recently created 20+ short examples for my own edification.  All of them were written for the MSP430F5529 LaunchPad and most of the peripherals are covered.  In some cases pushbuttons, LEDs, resistors, potentiometer, etc. are required that you probably have on hand.  A multimeter is required, and in some cases an oscilloscope and logic analyzer are instructive but not necessary.
     

    DriverLib SPI Example 13A_USCI_B_SPI_MCP41010_digiPot
     
    All of the examples are located here:  https://github.com/fmilburn3/MSP430F5529_driverlib_examples
     
    It is necessary to have some understanding of the registers before using DriverLib because the DriverLib documentation doesn't describe how the peripherals and their registers work.  The documentation for registers is located in the User
  15. Like
    Rickta59 got a reaction from OzGrant in Determining Board Selection   
    In the latest version this has probably changed:
     
    https://github.com/energia/tivac-core/blob/master/boards.txt#L35
     
    EK_TM4C1294XL
     
    -rick
  16. Like
    Rickta59 got a reaction from yyrkoon in UART - Sending 3 bytes per start/stop bit sets.   
    I can't say I've ever seen a UART with 24 bits of data. I have seen 9 bit but that was the max.
     
    Maybe you can use the spidev peripheral to send the data.  I had some sample code that used spidev to send data that was actually a wave form for those ws2811 leds.  
     
    https://github.com/RickKimball/beaglebone/tree/master/ws2811_spi_test
     
    -rick
  17. Like
    Rickta59 reacted to Fmilburn in It's Halloween Again   
    Here are my finished projects for the season...
     
    This is a princess tiara made from the wearable G2553 I posted above.  It drives 3 WS2812 "neopixels" on a tiara that I bought at the dollar store.  The WS2812 were ordered from Aliexpress and I find them difficult to solder up in a chain by hand.  I need to put together a jig or something to hold things in place and make it easier.

    All princesses need a magic wand and this one came with the tiara.  I cut out a star shape from some 4x6 cm 0.1" pitch PCB and soldered a blinking RGB LED, coin cell holder, and a tilt ball type switch to it.  The wand turns off when pointed down and on when lifted up while blinking different colors.  Because of bounce in the switch it kind of randomly blinks itself when shaken which is interesting.  I took a number of pictures to capture the 3 colors shown.

    The big project was the ferry boat.  Here is a photo of one of the many ferry boats that run in the Seattle area:

    I start by choosing a main box to work from and shape it.

    Then lay out more pieces to get an idea of what it will look like.

    Then cut to shape, glue everything up, and paint.  The electronics are more WS2812 and another G2553 wearable.  I had planned to add more electronic gizmos to this but ran out of time.  I guess that leaves me with something to do next year though.

    My grandson has been helping a bit.  He is really into Lego.  He built this pumpkin and then we put an LED into that is just taped to a coin cell.

    Finally, some satisfied customers at the local fall festival parade...


  18. Like
    Rickta59 got a reaction from veryalive in neo430 - msp430 compatible FPGA processor   
    For a long time, I have had an interest in FPGA development. You can find boards that come with a JTAG programmer on ebay for less than $20. The following ebay link shows a board similar to the one I had purchased http://www.ebay.com/itm/361568712810  I experimented with it a lot for a while and then I probably got distracted by some new TI toy  Occasionally, I would pick it up and try different things with it. However, the cost and form factor of the chips discourages me from doing anything real with it.  For me these things are more of an educational plaything.
     
    Yesterday, I noticed the neo430 project on opencores.org. It is an msp430 compatible processor implemented in VHDL. It didn't take me long to get it installed and it actually seems to work pretty well. There are some difference between the neo430 and the msp430. ( see list below for the details ) Using the Altera Cyclone II EP2C5 board I linked above I was able to use the example code to create an msp430 like device with 4K of ROM and 4K of RAM. It runs a serial bootloader over its UART peripheral and allows you to toggle the pins using its parallel port peripheral. It has a simple timer peripheral. It has its own custom peripherals and 'C' header files setup to access those. It comes all setup to use msp430-gcc as a development tool with the device you create.
     
    The instructions are pretty complete neo430 instructions  , I just followed them to get started.  For my Altera chip, I used the free web edition of quartus II 13.0.1 sp1 to convert the VHDL code into a loadable bitstream. Once you load that on to the FPGA chip using the USB-Blaster, a serial terminal is used to interact with the bootloader and upload msp430-gcc compiled files.  The provided makefiles automate the msp430 code creation process.  I'm using this on linux and I had to make a few changes to point at the directory where my msp430-gcc is installed. If you are windows user it will probably just work out of the box for you.

    I'll try and post more on my experiments.  In the meantime, I thought others might find it interesting.
     
    Functional Diagram:

     
    Memory Layout:

     
  19. Like
    Rickta59 got a reaction from jazz in neo430 - msp430 compatible FPGA processor   
    For a long time, I have had an interest in FPGA development. You can find boards that come with a JTAG programmer on ebay for less than $20. The following ebay link shows a board similar to the one I had purchased http://www.ebay.com/itm/361568712810  I experimented with it a lot for a while and then I probably got distracted by some new TI toy  Occasionally, I would pick it up and try different things with it. However, the cost and form factor of the chips discourages me from doing anything real with it.  For me these things are more of an educational plaything.
     
    Yesterday, I noticed the neo430 project on opencores.org. It is an msp430 compatible processor implemented in VHDL. It didn't take me long to get it installed and it actually seems to work pretty well. There are some difference between the neo430 and the msp430. ( see list below for the details ) Using the Altera Cyclone II EP2C5 board I linked above I was able to use the example code to create an msp430 like device with 4K of ROM and 4K of RAM. It runs a serial bootloader over its UART peripheral and allows you to toggle the pins using its parallel port peripheral. It has a simple timer peripheral. It has its own custom peripherals and 'C' header files setup to access those. It comes all setup to use msp430-gcc as a development tool with the device you create.
     
    The instructions are pretty complete neo430 instructions  , I just followed them to get started.  For my Altera chip, I used the free web edition of quartus II 13.0.1 sp1 to convert the VHDL code into a loadable bitstream. Once you load that on to the FPGA chip using the USB-Blaster, a serial terminal is used to interact with the bootloader and upload msp430-gcc compiled files.  The provided makefiles automate the msp430 code creation process.  I'm using this on linux and I had to make a few changes to point at the directory where my msp430-gcc is installed. If you are windows user it will probably just work out of the box for you.

    I'll try and post more on my experiments.  In the meantime, I thought others might find it interesting.
     
    Functional Diagram:

     
    Memory Layout:

     
  20. Like
    Rickta59 got a reaction from LiviuM in neo430 - msp430 compatible FPGA processor   
    For a long time, I have had an interest in FPGA development. You can find boards that come with a JTAG programmer on ebay for less than $20. The following ebay link shows a board similar to the one I had purchased http://www.ebay.com/itm/361568712810  I experimented with it a lot for a while and then I probably got distracted by some new TI toy  Occasionally, I would pick it up and try different things with it. However, the cost and form factor of the chips discourages me from doing anything real with it.  For me these things are more of an educational plaything.
     
    Yesterday, I noticed the neo430 project on opencores.org. It is an msp430 compatible processor implemented in VHDL. It didn't take me long to get it installed and it actually seems to work pretty well. There are some difference between the neo430 and the msp430. ( see list below for the details ) Using the Altera Cyclone II EP2C5 board I linked above I was able to use the example code to create an msp430 like device with 4K of ROM and 4K of RAM. It runs a serial bootloader over its UART peripheral and allows you to toggle the pins using its parallel port peripheral. It has a simple timer peripheral. It has its own custom peripherals and 'C' header files setup to access those. It comes all setup to use msp430-gcc as a development tool with the device you create.
     
    The instructions are pretty complete neo430 instructions  , I just followed them to get started.  For my Altera chip, I used the free web edition of quartus II 13.0.1 sp1 to convert the VHDL code into a loadable bitstream. Once you load that on to the FPGA chip using the USB-Blaster, a serial terminal is used to interact with the bootloader and upload msp430-gcc compiled files.  The provided makefiles automate the msp430 code creation process.  I'm using this on linux and I had to make a few changes to point at the directory where my msp430-gcc is installed. If you are windows user it will probably just work out of the box for you.

    I'll try and post more on my experiments.  In the meantime, I thought others might find it interesting.
     
    Functional Diagram:

     
    Memory Layout:

     
  21. Like
    Rickta59 got a reaction from dubnet in neo430 - msp430 compatible FPGA processor   
    For a long time, I have had an interest in FPGA development. You can find boards that come with a JTAG programmer on ebay for less than $20. The following ebay link shows a board similar to the one I had purchased http://www.ebay.com/itm/361568712810  I experimented with it a lot for a while and then I probably got distracted by some new TI toy  Occasionally, I would pick it up and try different things with it. However, the cost and form factor of the chips discourages me from doing anything real with it.  For me these things are more of an educational plaything.
     
    Yesterday, I noticed the neo430 project on opencores.org. It is an msp430 compatible processor implemented in VHDL. It didn't take me long to get it installed and it actually seems to work pretty well. There are some difference between the neo430 and the msp430. ( see list below for the details ) Using the Altera Cyclone II EP2C5 board I linked above I was able to use the example code to create an msp430 like device with 4K of ROM and 4K of RAM. It runs a serial bootloader over its UART peripheral and allows you to toggle the pins using its parallel port peripheral. It has a simple timer peripheral. It has its own custom peripherals and 'C' header files setup to access those. It comes all setup to use msp430-gcc as a development tool with the device you create.
     
    The instructions are pretty complete neo430 instructions  , I just followed them to get started.  For my Altera chip, I used the free web edition of quartus II 13.0.1 sp1 to convert the VHDL code into a loadable bitstream. Once you load that on to the FPGA chip using the USB-Blaster, a serial terminal is used to interact with the bootloader and upload msp430-gcc compiled files.  The provided makefiles automate the msp430 code creation process.  I'm using this on linux and I had to make a few changes to point at the directory where my msp430-gcc is installed. If you are windows user it will probably just work out of the box for you.

    I'll try and post more on my experiments.  In the meantime, I thought others might find it interesting.
     
    Functional Diagram:

     
    Memory Layout:

     
  22. Like
    Rickta59 got a reaction from chicken in neo430 - msp430 compatible FPGA processor   
    For a long time, I have had an interest in FPGA development. You can find boards that come with a JTAG programmer on ebay for less than $20. The following ebay link shows a board similar to the one I had purchased http://www.ebay.com/itm/361568712810  I experimented with it a lot for a while and then I probably got distracted by some new TI toy  Occasionally, I would pick it up and try different things with it. However, the cost and form factor of the chips discourages me from doing anything real with it.  For me these things are more of an educational plaything.
     
    Yesterday, I noticed the neo430 project on opencores.org. It is an msp430 compatible processor implemented in VHDL. It didn't take me long to get it installed and it actually seems to work pretty well. There are some difference between the neo430 and the msp430. ( see list below for the details ) Using the Altera Cyclone II EP2C5 board I linked above I was able to use the example code to create an msp430 like device with 4K of ROM and 4K of RAM. It runs a serial bootloader over its UART peripheral and allows you to toggle the pins using its parallel port peripheral. It has a simple timer peripheral. It has its own custom peripherals and 'C' header files setup to access those. It comes all setup to use msp430-gcc as a development tool with the device you create.
     
    The instructions are pretty complete neo430 instructions  , I just followed them to get started.  For my Altera chip, I used the free web edition of quartus II 13.0.1 sp1 to convert the VHDL code into a loadable bitstream. Once you load that on to the FPGA chip using the USB-Blaster, a serial terminal is used to interact with the bootloader and upload msp430-gcc compiled files.  The provided makefiles automate the msp430 code creation process.  I'm using this on linux and I had to make a few changes to point at the directory where my msp430-gcc is installed. If you are windows user it will probably just work out of the box for you.

    I'll try and post more on my experiments.  In the meantime, I thought others might find it interesting.
     
    Functional Diagram:

     
    Memory Layout:

     
  23. Like
    Rickta59 reacted to jazz in Basic Question in using MSP430   
    I just don't see any reason for buying old MSP430G2 LP with not updatable firmware and limited support for 10$, when new MSP430F5529 LP based on eZ-FET Lite with updatable (open source) firmware can program all SBW devices for 13$.
  24. Like
    Rickta59 got a reaction from Fmilburn in MSP430 Project on the Ben Heck Show   
    man .. Let's use an external RTC you have to buy because I don't  learn that anything about the msp430fr chips. Oh yeah and the ADS-7042 is a $45 booster pack.  Oh yeah and the article links to the msp430g2 launchpad but his whole segment is about the msp430fr4133 ... hmm element14 must have a pile of msp430g2 boards they are trying to dump
  25. Like
    Rickta59 got a reaction from spirilis in MSP-EXP432P401R Pre-Production (black PCB) LaunchPad to be Phased Out   
    Heh .. you can always tell when someone gets a new hot air tool
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