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guybarash

PWM with spedific period

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hi , i'm trying to create a PWM signal with period of 15 msec and pulse width the can vary between 1.1 msec and 1.9 msec. 

(I'm using the Msp430F5529 ) 

how can i do it? thx in advance.

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You're using CCS or Energia?

Anyway, you first need to set up your timer to a clock source of which you can take a certain number to get your 15msec period.

For example, if your SMCLK is set to 1MHz (1 usec-1), you'll need 15000 of those pulses to get 15msec. This 15000 would go into CCR0 of that timer and the timer is set in UP mode (so it will reset at 15000).

Then you can alter the PWM cycle by changing the CCR1 or CCR2 value between 1100 and 1900, be sure to set up a pin for timer output and to set that CCR to have Set/Reset behaviour.

Assuming you're using an MSP430G2 you can look into the family guide SLAU144J (google it) and the datasheet for your specific MSP430.

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step 1: set up your clocks in the (basic) clock system (SMCLK, MCLK and ACLK, maybe others for the F5 series)

step 2: set up your timer (TimerA) to use the right clock (probably SMCLK or SMCLK/8)

step 3: set up your timer to UP mode and set CCR0

step 4: set up your CCRx to Set/Reset output mode

step 5: set up your pin to use timer output

 

At least, this is the case for the G2 series, most hardware blocks are reused on cheaper MSP430s, so the TimerA block is probably available on the F5 series as well.

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Quick question on this - the counters go from 0-n and reset at n, so the actual count would be n+1.

 

I thought that to count precisely "n" tickets, the CCRx registers would have to be set to "n-1"...

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Quick question on this - the counters go from 0-n and reset at n, so the actual count would be n+1.

 

I thought that to count precisely "n" tickets, the CCRx registers would have to be set to "n-1"...

You're right on that one. You could invert that logic and observe that a count of 0 would cause unpredictable behaviour.

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